diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 74e34b84419a..048d96cfd1a2 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -581,7 +581,7 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sdr12 = <0xa>; ti,itap-del-sel-sdr25 = <0x1>; ti,clkbuf-sel = <0x7>; - bus-width = <4>; + bus-width = <1>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts index b1737978103b..e6bc1c28c481 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts @@ -13,15 +13,25 @@ / { compatible = "ti,am625-sk", "ti,am625"; model = "Texas Instruments AM625 SK"; - opp-table { - /* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */ - opp-1400000000 { - opp-hz = /bits/ 64 <1400000000>; - opp-supported-hw = <0x01 0x0004>; - clock-latency-ns = <6000000>; - }; + aliases { + serial4 = &main_uart4; + serial6 = &main_uart6; + gpio2 = &mcu_gpio0; }; + transceiver2: can-phy1 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; + + transceiver3: can-phy2 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; + + memory@80000000 { device_type = "memory"; /* 2G RAM */ @@ -68,9 +78,10 @@ vdd_mmc1: regulator-3 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; - enable-active-high; + /* enable-active-high; */ vin-supply = <&vcc_3v3_sys>; - gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; + regulator-always-on; + /* gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; */ }; vdd_sd_dv: regulator-4 { @@ -82,7 +93,8 @@ vdd_sd_dv: regulator-4 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; - vin-supply = <&vcc_5v0>; + regulator-always-on; + vin-supply = <&vcc_3v3_sys>; gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; states = <1800000 0x0>, <3300000 0x1>; @@ -105,7 +117,7 @@ wlan_lten: regulator-6 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vcc_3v3_sys>; - regulator-always-on; + /* regulator-always-on; */ gpios = <&exp1 11 GPIO_ACTIVE_LOW>; }; @@ -120,6 +132,19 @@ wlan_en: regulator-7 { pinctrl-names = "default"; pinctrl-0 = <&wlan_en_pins_default>; }; + + btwlan_en: regulator-8 { + compatible = "regulator-fixed"; + regulator-name = "btwlan_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&wlan_lten>; + enable-active-high; + gpios = <&mcu_gpio0 1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_btwlan_en_pins_default>; + }; + }; &main_pmx0 { @@ -191,6 +216,95 @@ main_wlirq_pins_default: main-wlirq-pins-default { AM62X_IOPAD(0x128, PIN_INPUT, 7) /* (B23) MMC2_SDWP.GPIO0_72 */ >; }; + + /* For BT/WLAN connection interface */ + main_uart4_pins_default: main-uart4-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x00b0, PIN_INPUT, 3) /* (K22) GPMC0_CSn2.UART4_RXD */ + AM62X_IOPAD(0x00b4, PIN_OUTPUT, 3) /* (K24) GPMC0_CSn3.UART4_TXD */ + >; + }; + + /* For UART6 RS232 */ + main_uart6_pins_default: main-uart6-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x009c, PIN_INPUT, 3) /* (V25) GPMC0_WAIT1.UART6_RXD */ + AM62X_IOPAD(0x00a0, PIN_OUTPUT, 3) /* (K25) GPMC0_WPn.UART6_TXD */ + >; + }; + + /* For CAN0 , CAN2 */ + main_mcan0_pins_default: main-mcan0-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ + AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ + >; + }; + + +}; + +&mcu_gpio0 { + status = "okay"; +}; + +&mcu_gpio_intr { + status = "okay"; +}; + +&main_uart4 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_uart4_pins_default &mcu_btwlan_en_pins_default>; + + bluetooth { + enable-gpios = <&mcu_gpio0 1 GPIO_ACTIVE_HIGH>; + }; + +}; + +&main_uart6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_uart6_pins_default>; +}; + +&mcu_pmx0 { + /* Enable BT/WLAN Pin */ + mcu_btwlan_en_pins_default: mcu-btwlan-en-pins-default { + pinctrl-single,pins = < + AM62X_MCU_IOPAD(0x0004, PIN_OUTPUT_PULLUP, 7) /* (B8) MCU_SPI0_CS1.MCU_GPIO0_1 */ + >; + }; + + mcu_mcan1_pins_default: mcu-mcan1-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ + AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan2_pins_default: mcu-mcan2-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */ + AM62X_IOPAD(0x03C, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */ + >; + }; + +}; + +&mcu_mcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_pins_default>; + phys = <&transceiver2>; + status = "okay"; +}; + +&mcu_mcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan2_pins_default>; + phys = <&transceiver3>; + status = "okay"; }; &main_i2c1 { @@ -223,6 +337,7 @@ exp1: gpio@22 { }; &sdhci1 { + status = "okay"; vmmc-supply = <&vdd_mmc1>; vqmmc-supply = <&vdd_sd_dv>; }; @@ -345,9 +460,9 @@ partition@3fc0000 { }; }; -&tlv320aic3106 { - DVDD-supply = <&vcc_1v8>; -}; +//&tlv320aic3106 { +// DVDD-supply = <&vcc_1v8>; +//}; #define K3_TS_OFFSET(pa, val) (0x4+(pa)*4) (0x10000 | val) diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi index 07763091ab59..691b232b41f8 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi @@ -21,6 +21,7 @@ aliases { ethernet1 = &cpsw_port2; usb0 = &usb0; usb1 = &usb1; + gpio0 = &main_gpio0; }; chosen { @@ -105,6 +106,57 @@ framebuffer: framebuffer@ff700000 { }; }; + lcd_bl: backlight { + compatible = "pwm-backlight"; + pwms = <&epwm0 0 50000 0>; + brightness-levels = + <0 32 64 96 128 160 192 224 255>; + default-brightness-level = <8>; + }; + + display { + compatible = "edt,et070080dh6"; + backlight = <&lcd_bl>; + port { + lcd_in: endpoint { + remote-endpoint = <&dpi1_out>; + }; + }; + }; + + + clk_mcasp1_fixed: clk_mcasp1_fixed { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24576000>; + }; + + clk_mcasp1: clk_mcasp1 { + #clock-cells = <0>; + compatible = "gpio-gate-clock"; + clocks = <&clk_mcasp1_fixed>; + //enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */ + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "Audio card name"; + simple-audio-card,dai-link@0 { + format = "i2s"; + bitclock-master = <&sound0_master>; + frame-master = <&sound0_master>; + sound0_master: cpu { + sound-dai = <&mcasp1>; + clocks = <&clk_mcasp1>; + }; + + codec { + sound-dai = <&tas2505>; + }; + }; + }; + + /* leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -153,7 +205,7 @@ sound_master: simple-audio-card,codec { clocks = <&tlv320_mclk>; }; }; - + hdmi: connector { compatible = "hdmi-connector"; label = "hdmi"; @@ -164,6 +216,7 @@ hdmi_connector_in: endpoint { }; }; }; + */ }; &main_pmx0 { @@ -188,14 +241,14 @@ AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17/A17) I2C1_SCL */ AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17/A16) I2C1_SDA */ >; }; - - main_i2c2_pins_default: main-i2c2-pins-default { - pinctrl-single,pins = < - AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22/H18) GPMC0_CSn2.I2C2_SCL */ - AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24/H19) GPMC0_CSn3.I2C2_SDA */ - >; - }; - + + /* main_i2c2_pins_default: main-i2c2-pins-default { */ + /* pinctrl-single,pins = < */ + /* AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) */ /* (K22/H18) GPMC0_CSn2.I2C2_SCL */ + /* AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) */ /* (K24/H19) GPMC0_CSn3.I2C2_SDA */ + /* >;*/ + /*};*/ + main_mmc0_pins_default: main-mmc0-pins-default { pinctrl-single,pins = < AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */ @@ -316,6 +369,30 @@ AM62X_IOPAD(0x0074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */ AM62X_IOPAD(0x0078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */ >; }; + + epwm0bl_pins_default: epwm0bl-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01b4, PIN_OUTPUT_PULLUP, 2) /* (A13) SPI0_CS0.EHRPWM0_A */ + >; + }; + +}; + +&mcu_pmx0 { + touchscreen_pins_default: touchscreen-default-pins { + pinctrl-single,pins = < + AM62X_MCU_IOPAD(0x0024, PIN_OUTPUT, 0) /* (B4) WKUP_UART0_RXD */ + AM62X_MCU_IOPAD(0x0028, PIN_INPUT, 0) /* (C5) WKUP_UART0_TXD */ + >; + }; + + /* AMP reset */ + //ampreset_pins_default: ampreset-default-pins { + // pinctrl-single,pins = < + // AM62X_MCU_IOPAD(0x000c, PIN_OUTPUT_PULLDOWN, 7) /* (D9) MCU_SPI0_D0.MCU_GPIO0_3 */ + // >; + //}; + }; &wkup_uart0 { @@ -337,12 +414,41 @@ &main_uart1 { status = "reserved"; }; +&epwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&epwm0bl_pins_default>; + status = "okay"; + }; + +&main_gpio0 { + status = "okay"; +}; + &main_i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; + eeprom@51 { + compatible = "atmel,24c512"; + reg = <0x51>; + pagesize = <64>; + }; + + touchscreen@14 { + compatible = "goodix,gt911"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_pins_default>; + interrupt-parent = <&main_gpio0>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; + irq-gpios = <&main_gpio0 9 GPIO_ACTIVE_LOW>; + reset-gpios = <&main_gpio0 10 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + }; + typec_pd0: tps6598x@3f { compatible = "ti,tps6598x"; reg = <0x3f>; @@ -374,18 +480,34 @@ &main_i2c1 { pinctrl-0 = <&main_i2c1_pins_default>; clock-frequency = <100000>; - tlv320aic3106: audio-codec@1b { + pcf8523_rtc: rtc@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + quartz-load-femtofarads = <1250>; + }; + + tas2505: tas2505@18 { #sound-dai-cells = <0>; - compatible = "ti,tlv320aic3106"; - reg = <0x1b>; - ai3x-micbias-vg = <1>; /* 2.0V */ + compatible = "ti,tas2505"; + reg = <0x18>; + //reset-gpios = <&mcu_gpio0 3 GPIO_ACTIVE_LOW>; + gpio-reset = <&mcu_gpio0 3 GPIO_ACTIVE_LOW>; + clock-source = <1>;/* 0: MCLK, 1: BCLK */ + status = "ok"; + }; + + //tlv320aic3106: audio-codec@1b { + // #sound-dai-cells = <0>; + // compatible = "ti,tlv320aic3106"; + // reg = <0x1b>; + // ai3x-micbias-vg = <1>; /* 2.0V */ /* Regulators */ - AVDD-supply = <&vcc_3v3_sys>; - IOVDD-supply = <&vcc_3v3_sys>; - DRVDD-supply = <&vcc_3v3_sys>; - }; - + // AVDD-supply = <&vcc_3v3_sys>; + // IOVDD-supply = <&vcc_3v3_sys>; + // DRVDD-supply = <&vcc_3v3_sys>; + //}; + /* sii9022: sii9022@3b { #sound-dai-cells = <0>; compatible = "sil,sii9022"; @@ -416,15 +538,17 @@ sii9022_out: endpoint { }; }; }; - }; + }; */ }; +/* &main_i2c2 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c2_pins_default>; clock-frequency = <400000>; }; +*/ &sdhci0 { status = "okay"; @@ -519,22 +643,36 @@ &usb1 { pinctrl-0 = <&main_usb1_pins_default>; }; -&mcasp1 { - status = "okay"; +//&mcasp1 { +// status = "okay"; +// #sound-dai-cells = <0>; +// +// pinctrl-names = "default"; +// pinctrl-0 = <&main_mcasp1_pins_default>; + +// op-mode = <0>; /* MCASP_IIS_MODE */ +// tdm-slots = <2>; + +// serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ +// 1 0 2 0 +// 0 0 0 0 +// 0 0 0 0 +// 0 0 0 0 +// >; +// tx-num-evt = <32>; +// rx-num-evt = <32>; +//}; + +&mcasp1 { #sound-dai-cells = <0>; - pinctrl-names = "default"; pinctrl-0 = <&main_mcasp1_pins_default>; - - op-mode = <0>; /* MCASP_IIS_MODE */ - tdm-slots = <2>; - - serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ - 1 0 2 0 - 0 0 0 0 - 0 0 0 0 - 0 0 0 0 - >; + status = "okay"; + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <8>; + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 2 2 1 0 + >; tx-num-evt = <32>; rx-num-evt = <32>; }; @@ -564,7 +702,7 @@ port@1 { reg = <1>; dpi1_out: endpoint { - remote-endpoint = <&sii9022_in>; + remote-endpoint = <&lcd_in>; }; }; }; diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e56a47228ac3..c803af7e8513 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1,6 +1,48 @@ CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_AUDIT=y +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_SIM=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y +CONFIG_GENERIC_IRQ_RESERVATION_MODE=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_ARCH_CLOCKSOURCE_INIT=y +CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set CONFIG_NO_HZ_IDLE=y CONFIG_HIGH_RES_TIMERS=y CONFIG_BPF_SYSCALL=y @@ -218,9 +260,9 @@ CONFIG_CGROUP_NET_PRIO=y CONFIG_CAN=m CONFIG_BT=m CONFIG_BT_HIDP=m -# CONFIG_BT_LE is not set +CONFIG_BT_LE=m CONFIG_BT_LEDS=y -# CONFIG_BT_DEBUGFS is not set +CONFIG_BT_DEBUGFS=m CONFIG_BT_HCIBTUSB=m CONFIG_BT_HCIUART=m CONFIG_BT_HCIUART_LL=y @@ -331,7 +373,7 @@ CONFIG_QCOM_FASTRPC=m CONFIG_SRAM=y CONFIG_SRAM_DMA_HEAP=y CONFIG_PCI_ENDPOINT_TEST=m -CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=m CONFIG_UACCE=m # CONFIG_SCSI_PROC_FS is not set @@ -477,10 +519,13 @@ CONFIG_KEYBOARD_SNVS_PWRKEY=m CONFIG_KEYBOARD_IMX_SC_KEY=m CONFIG_KEYBOARD_CROS_EC=y CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ATMEL_MXT=m -CONFIG_TOUCHSCREEN_GOODIX=m -CONFIG_TOUCHSCREEN_ILI210X=m -CONFIG_TOUCHSCREEN_EDT_FT5X06=m +CONFIG_I2C_HID_OF_GOODIX=y +# CONFIG_TOUCHSCREEN_GT9XXNEW_TS=y +# CONFIG_TOUCHSCREEN_GT9XXNEWDUP_TS=y +# CONFIG_TOUCHSCREEN_ATMEL_MXT=m +CONFIG_TOUCHSCREEN_GOODIX=y +# CONFIG_TOUCHSCREEN_ILI210X=m +# CONFIG_TOUCHSCREEN_EDT_FT5X06=m CONFIG_INPUT_MISC=y CONFIG_INPUT_PM8941_PWRKEY=y CONFIG_INPUT_PM8XXX_VIBRATOR=m @@ -493,6 +538,7 @@ CONFIG_SERIO_AMBAKMI=y CONFIG_LEGACY_PTY_COUNT=16 CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_8250_BCM2835AUX=y @@ -526,6 +572,8 @@ CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y CONFIG_SERIAL_MVEBU_UART=y CONFIG_SERIAL_OWL=y CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_8250_NR_UARTS=12 +CONFIG_SERIAL_8250_RUNTIME_UARTS=12 CONFIG_VIRTIO_CONSOLE=y CONFIG_IPMI_HANDLER=m CONFIG_IPMI_DEVICE_INTERFACE=m @@ -559,6 +607,8 @@ CONFIG_I2C_TEGRA=y CONFIG_I2C_UNIPHIER_F=y CONFIG_I2C_RCAR=y CONFIG_I2C_CROS_EC_TUNNEL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y CONFIG_SPI=y CONFIG_SPI_ARMADA_3700=y CONFIG_SPI_BCM2835=m @@ -644,6 +694,15 @@ CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_BD9571MWV=m CONFIG_GPIO_MAX77620=y CONFIG_GPIO_SL28CPLD=m +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y CONFIG_POWER_RESET_MSM=y CONFIG_POWER_RESET_QCOM_PON=m CONFIG_POWER_RESET_XGENE=y @@ -887,64 +946,66 @@ CONFIG_SND_SOC_FSL_ASOC_CARD=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_SND_MESON_AXG_SOUND_CARD=m CONFIG_SND_MESON_GX_SOUND_CARD=m -CONFIG_SND_SOC_QCOM=m -CONFIG_SND_SOC_APQ8016_SBC=m -CONFIG_SND_SOC_MSM8996=m -CONFIG_SND_SOC_SDM845=m -CONFIG_SND_SOC_SM8250=m -CONFIG_SND_SOC_SC7180=m -CONFIG_SND_SOC_SC7280=m -CONFIG_SND_SOC_ROCKCHIP=m -CONFIG_SND_SOC_ROCKCHIP_SPDIF=m -CONFIG_SND_SOC_ROCKCHIP_RT5645=m -CONFIG_SND_SOC_RK3399_GRU_SOUND=m -CONFIG_SND_SOC_SAMSUNG=y +# CONFIG_SND_SOC_QCOM=m +# CONFIG_SND_SOC_APQ8016_SBC=m +# CONFIG_SND_SOC_MSM8996=m +# CONFIG_SND_SOC_SDM845=m +# CONFIG_SND_SOC_SM8250=m +# CONFIG_SND_SOC_SC7180=m +# CONFIG_SND_SOC_SC7280=m +# CONFIG_SND_SOC_ROCKCHIP=m +# CONFIG_SND_SOC_ROCKCHIP_SPDIF=m +# CONFIG_SND_SOC_ROCKCHIP_RT5645=m +# CONFIG_SND_SOC_RK3399_GRU_SOUND=m +# CONFIG_SND_SOC_SAMSUNG=y CONFIG_SND_SOC_RCAR=m CONFIG_SND_SOC_RZ=m -CONFIG_SND_SUN8I_CODEC=m -CONFIG_SND_SUN8I_CODEC_ANALOG=m -CONFIG_SND_SUN50I_CODEC_ANALOG=m -CONFIG_SND_SUN4I_I2S=m -CONFIG_SND_SUN4I_SPDIF=m -CONFIG_SND_SOC_TEGRA=m -CONFIG_SND_SOC_TEGRA210_AHUB=m -CONFIG_SND_SOC_TEGRA210_DMIC=m -CONFIG_SND_SOC_TEGRA210_I2S=m -CONFIG_SND_SOC_TEGRA210_OPE=m -CONFIG_SND_SOC_TEGRA186_ASRC=m -CONFIG_SND_SOC_TEGRA186_DSPK=m -CONFIG_SND_SOC_TEGRA210_ADMAIF=m -CONFIG_SND_SOC_TEGRA210_MVC=m -CONFIG_SND_SOC_TEGRA210_SFC=m -CONFIG_SND_SOC_TEGRA210_AMX=m -CONFIG_SND_SOC_TEGRA210_ADX=m -CONFIG_SND_SOC_TEGRA210_MIXER=m -CONFIG_SND_SOC_TEGRA_AUDIO_GRAPH_CARD=m -CONFIG_SND_SOC_J721E_EVM=m -CONFIG_SND_SOC_AK4613=m -CONFIG_SND_SOC_ES7134=m -CONFIG_SND_SOC_ES7241=m -CONFIG_SND_SOC_GTM601=m -CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m -CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m -CONFIG_SND_SOC_RT5659=m -CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m -CONFIG_SND_SOC_SIMPLE_MUX=m -CONFIG_SND_SOC_TAS571X=m -CONFIG_SND_SOC_TLV320AIC32X4_I2C=m -CONFIG_SND_SOC_TLV320AIC3X_I2C=m -CONFIG_SND_SOC_WCD9335=m -CONFIG_SND_SOC_WCD934X=m -CONFIG_SND_SOC_WM8524=m -CONFIG_SND_SOC_WM8904=m -CONFIG_SND_SOC_WM8960=m -CONFIG_SND_SOC_WM8962=m -CONFIG_SND_SOC_WM8978=m -CONFIG_SND_SOC_WSA881X=m -CONFIG_SND_SOC_NAU8822=m -CONFIG_SND_SOC_LPASS_WSA_MACRO=m -CONFIG_SND_SOC_LPASS_VA_MACRO=m -CONFIG_SND_SIMPLE_CARD=m +# CONFIG_SND_SUN8I_CODEC=m +# CONFIG_SND_SUN8I_CODEC_ANALOG=m +# CONFIG_SND_SUN50I_CODEC_ANALOG=m +# CONFIG_SND_SUN4I_I2S=m +# CONFIG_SND_SUN4I_SPDIF=m +# CONFIG_SND_SOC_TEGRA=m +# CONFIG_SND_SOC_TEGRA210_AHUB=m +# CONFIG_SND_SOC_TEGRA210_DMIC=m +# CONFIG_SND_SOC_TEGRA210_I2S=m +# CONFIG_SND_SOC_TEGRA210_OPE=m +# CONFIG_SND_SOC_TEGRA186_ASRC=m +# CONFIG_SND_SOC_TEGRA186_DSPK=m +# CONFIG_SND_SOC_TEGRA210_ADMAIF=m +# CONFIG_SND_SOC_TEGRA210_MVC=m +# CONFIG_SND_SOC_TEGRA210_SFC=m +# CONFIG_SND_SOC_TEGRA210_AMX=m +# CONFIG_SND_SOC_TEGRA210_ADX=m +# CONFIG_SND_SOC_TEGRA210_MIXER=m +# CONFIG_SND_SOC_TEGRA_AUDIO_GRAPH_CARD=m +# CONFIG_SND_SOC_J721E_EVM=m +# CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_ES7134=m +# CONFIG_SND_SOC_ES7241=m +# CONFIG_SND_SOC_GTM601=m +# CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m +# CONFIG_SND_SOC_RT5659=m +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m +# CONFIG_SND_SOC_SIMPLE_MUX=m +# CONFIG_SND_SOC_TAS571X=m +CONFIG_SND_SOC_TAS2505=y +# CONFIG_SND_SOC_TLV320AIC32X4_I2C=m +# CONFIG_SND_SOC_TLV320AIC3X_I2C=m +# CONFIG_SND_SOC_WCD9335=m +# CONFIG_SND_SOC_WCD934X=m +# CONFIG_SND_SOC_WM8524=m +# CONFIG_SND_SOC_WM8904=m +# CONFIG_SND_SOC_WM8960=m +# CONFIG_SND_SOC_WM8962=m +# CONFIG_SND_SOC_WM8978=m +# CONFIG_SND_SOC_WSA881X=m +# CONFIG_SND_SOC_NAU8822=m +# CONFIG_SND_SOC_LPASS_WSA_MACRO=m +# CONFIG_SND_SOC_LPASS_VA_MACRO=m +CONFIG_SND_SIMPLE_CARD=y +CONFIG_SND_SIMPLE_CARD_UTILS=y CONFIG_SND_AUDIO_GRAPH_CARD=m CONFIG_SND_AUDIO_GRAPH_CARD2=m CONFIG_HID_MULTITOUCH=m @@ -1078,6 +1139,7 @@ CONFIG_RTC_DRV_MAX77686=y CONFIG_RTC_DRV_RK808=m CONFIG_RTC_DRV_PCF85063=m CONFIG_RTC_DRV_PCF85363=m +CONFIG_RTC_DRV_PCF8523=m CONFIG_RTC_DRV_M41T80=m CONFIG_RTC_DRV_BQ32K=m CONFIG_RTC_DRV_RX8581=m diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 3192411218fb..239a6874b491 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1711,8 +1711,9 @@ static const struct panel_desc edt_et057090dhu = { .connector_type = DRM_MODE_CONNECTOR_DPI, }; +/* taeha 202040806 Add LCD */ static const struct drm_display_mode edt_etm0700g0dh6_mode = { - .clock = 33260, + .clock = 26000, .hdisplay = 800, .hsync_start = 800 + 40, .hsync_end = 800 + 40 + 128, @@ -1724,16 +1725,17 @@ static const struct drm_display_mode edt_etm0700g0dh6_mode = { .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; +/* taeha 20240806 Add LCD */ static const struct panel_desc edt_etm0700g0dh6 = { .modes = &edt_etm0700g0dh6_mode, .num_modes = 1, - .bpc = 6, + .bpc = 8, .size = { - .width = 152, - .height = 91, + .width = 150, + .height = 94, }, - .bus_format = MEDIA_BUS_FMT_RGB666_1X18, - .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + /* .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, */ .connector_type = DRM_MODE_CONNECTOR_DPI, }; diff --git a/sound/soc/ti/Kconfig b/sound/soc/ti/Kconfig index 40110e9a9e8a..3b877c263b9f 100644 --- a/sound/soc/ti/Kconfig +++ b/sound/soc/ti/Kconfig @@ -63,6 +63,17 @@ config SND_SOC_OMAP_MCBSP Say Y or M here if you want to have support for McBSP IP found in Texas Instruments OMAP1/2/3/4/5 SoCs. +# taeha, 20240903 tas2505 amp +config SND_SOC_TAS2505 + tristate "Texas Instruments TAS2505" + select REGMAP + select REGMAP_I2C + select I2C + help + Enable support Texas Instruments tas2505. + To compile this driver as a module, choose M here. + If unsure select "N". + config SND_SOC_OMAP_MCPDM tristate "Multichannel PDM Controller (McPDM) support" depends on ARCH_OMAP4 || SOC_OMAP5 || COMPILE_TEST diff --git a/sound/soc/ti/Makefile b/sound/soc/ti/Makefile index a21e5b0061de..8d475e50403c 100644 --- a/sound/soc/ti/Makefile +++ b/sound/soc/ti/Makefile @@ -46,3 +46,6 @@ obj-$(CONFIG_SND_SOC_OMAP_AMS_DELTA) += snd-soc-ams-delta.o obj-$(CONFIG_SND_SOC_OMAP_HDMI) += snd-soc-omap-hdmi.o obj-$(CONFIG_SND_SOC_OMAP_OSK5912) += snd-soc-osk5912.o obj-$(CONFIG_SND_SOC_J721E_EVM) += snd-soc-j721e-evm.o + +snd-soc-tas2505-objs := tas2505.o +obj-$(CONFIG_SND_SOC_TAS2505) += snd-soc-tas2505.o diff --git a/sound/soc/ti/tas2505.c b/sound/soc/ti/tas2505.c new file mode 100644 index 000000000000..d8f1460d1e0d --- /dev/null +++ b/sound/soc/ti/tas2505.c @@ -0,0 +1,692 @@ +/* + * ALSA SoC TAS2505 codec driver + * + * Author: Hieu Tran Dang + * + * This package is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * THIS PACKAGE IS PROVIDED AS IS AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "tas2505.h" + +enum { + MCLK = 0, + BCLK = 1, +}; + +struct tas2505 +{ + int dac_vol; + int spk_vol1; +}tas2505_vol; + + +static int tas2505_dac_getvol(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = tas2505_vol.dac_vol; + + return 0; +} + +static int tas2505_dac_putvol(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + u8 val; + + val = ucontrol->value.integer.value[0]; + val = mc->invert ? mc->max - val : val; + val = (val < 0) ? 0 : val; + tas2505_vol.dac_vol = val; + snd_soc_component_write(component, TAS2505_DACVOL, val); + + return 0; +} + +static int tas2505_spkdrv_getvol(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + unsigned int val; + + val = snd_soc_component_read(component, TAS2505_SPKVOL1); + + val = (val > mc->max) ? mc->max : val; + val = mc->invert ? mc->max - val : val; + ucontrol->value.integer.value[0] = val; + tas2505_vol.spk_vol1 = val; + return 0; +} + +static int tas2505_spkdrv_putvol(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + u8 val; + + val = (ucontrol->value.integer.value[0] & 0x7f); + val = mc->invert ? mc->max - val : val; + val = (val < 0) ? 0 : val; + tas2505_vol.spk_vol1 = val; + snd_soc_component_write(component, TAS2505_SPKVOL1, val); + + return 0; +} + +static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6350, 50, 0); +static const DECLARE_TLV_DB_LINEAR(spk_drv_vol_tlv, TLV_DB_GAIN_MUTE, 0); +static const DECLARE_TLV_DB_SCALE(spk_amp_vol_tlv, 0, 600, 1); + +static const struct snd_kcontrol_new tas2505_snd_controls[] = { + SOC_SINGLE_RANGE_EXT_TLV("DAC Playback Volume", TAS2505_DACVOL, + 0, 48, 0x81, 1, + tas2505_dac_getvol, tas2505_dac_putvol, dac_vol_tlv), + SOC_SINGLE_RANGE_EXT_TLV("Speaker Driver Volume", TAS2505_SPKVOL1, + 0, 0, 117, 1, + tas2505_spkdrv_getvol, tas2505_spkdrv_putvol, spk_drv_vol_tlv), + SOC_SINGLE_TLV("Speaker Amplifer Volume", TAS2505_SPKVOL2, + 4, 5, 0, spk_amp_vol_tlv), +}; + +static const struct snd_soc_dapm_widget tas2505_dapm_widgets[] = { + SND_SOC_DAPM_DAC("DAC Channel", "Playback", + TAS2505_DACSETUP1, 7, 0), + SND_SOC_DAPM_OUT_DRV("Speaker Driver", TAS2505_SPKAMPCTRL1, + 1, 0, NULL, 0), + SND_SOC_DAPM_OUTPUT("Speaker"), +}; + +static const struct snd_soc_dapm_route tas2505_audio_map[] = { + { "Speaker Driver", NULL, "DAC Channel" }, + { "Speaker", NULL, "Speaker Driver" }, +}; + +static const struct reg_default tas2505_reg_defaults[] = { + { TAS2505_CLKMUX, 0x00 }, + { TAS2505_PLLPR, 0x11 }, + { TAS2505_PLLJ, 0x04 }, + { TAS2505_PLLDMSB, 0x00 }, + { TAS2505_PLLDLSB, 0x00 }, + { TAS2505_NDAC, 0x01 }, + { TAS2505_MDAC, 0x01 }, + { TAS2505_DOSRMSB, 0x00 }, + { TAS2505_DOSRLSB, 0x80 }, + { TAS2505_IFACE1, 0x00 }, + { TAS2505_IFACE3, 0x00 }, + { TAS2505_DACSETUP1, 0x14 }, + { TAS2505_DACSETUP2, 0x0c }, + { TAS2505_DACVOL, 0x00 }, + { TAS2505_REF_POR_LDO_BGAP_CTRL, 0x00 }, + { TAS2505_LDO_CTRL, 0x0c }, + { TAS2505_SPKAMPCTRL1, 0x00 }, + { TAS2505_SPKVOL1, 0x00 }, + { TAS2505_SPKVOL2, 0x50 }, + { TAS2505_DACFLAG1, 0x00 }, + { TAS2505_DACFLAG2, 0x00 }, + { TAS2505_STICKYFLAG1, 0x00 }, + { TAS2505_STICKYFLAG2, 0x00 }, + { TAS2505_INTFLAG1, 0x00 }, + { TAS2505_INTFLAG2, 0x00 }, + { TAS2505_DACINSTRSET, 0x02 }, + { TAS2505_DACANLGAINFLAG, 0x00 }, +}; + +static bool tas2505_volatile(struct device *dev, unsigned int reg) +{ + switch (reg) { + case TAS2505_PAGECTL: + case TAS2505_RESET: + case TAS2505_DACFLAG1: + case TAS2505_DACFLAG2: + case TAS2505_STICKYFLAG1: + case TAS2505_STICKYFLAG2: + case TAS2505_INTFLAG1: + case TAS2505_INTFLAG2: + case TAS2505_DACANLGAINFLAG: + return true; + } + return false; +} + +static bool tas2505_writeable(struct device *dev, unsigned int reg) +{ + switch (reg) { + case TAS2505_DACFLAG1: + case TAS2505_DACFLAG2: + case TAS2505_STICKYFLAG1: + case TAS2505_STICKYFLAG2: + case TAS2505_INTFLAG1: + case TAS2505_INTFLAG2: + case TAS2505_DACANLGAINFLAG: + return false; + } + return true; +} + +static const struct regmap_range_cfg tas2505_ranges[] = { + { + .range_min = 0, + .range_max = 69 * 128, + .selector_reg = TAS2505_PAGECTL, + .selector_mask = 0xff, + .selector_shift = 0, + .window_start = 0, + .window_len = 128, + }, +}; + +static const struct regmap_config tas2505_i2c_regmap = { + .reg_bits = 8, + .val_bits = 8, + .writeable_reg = tas2505_writeable, + .volatile_reg = tas2505_volatile, + .reg_defaults = tas2505_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(tas2505_reg_defaults), + .cache_type = REGCACHE_RBTREE, + .ranges = tas2505_ranges, + .num_ranges = ARRAY_SIZE(tas2505_ranges), + .max_register = 69 * 128, +}; + +struct tas2505_rate_divs { + u32 mclk_p; + u32 rate; + u8 pll_r; + u8 pll_j; + u16 pll_d; + u8 mdac; + u8 ndac; + u16 dosr; +}; + +static const struct tas2505_rate_divs tas2505_divs_mclksrc[] = { + { 12288000, 44100, 1, 7, 35, 4, 4, 128 }, + { 12288000, 48000, 1, 7, 0, 7, 2, 128 }, + { 2822400, 44100, 1, 8, 4672, 3, 5, 128 }, + { 11289600, 44100, 1, 8, 0, 4, 8, 64 }, + { 11289600, 22050, 1, 8, 0, 4, 8, 128 }, + { 2822400, 44100, 1, 8, 4672, 3, 5, 128 }, + { 2822400, 22050, 1, 8, 4672, 3, 5, 256 }, +}; + +static const struct tas2505_rate_divs tas2505_divs_bclksrc[] = { + { 1536000, 48000, 1, 56, 0, 2, 7, 128 }, + { 1411200, 44100, 1, 60, 0, 5, 3, 128 }, + { 3072000, 48000, 1, 28, 0, 2, 7, 128 }, + { 2822400, 44100, 1, 30, 0, 5, 3, 128 }, + { 1024000, 32000, 2, 40, 0, 5, 4, 128 }, + { 2048000, 32000, 1, 40, 0, 5, 4, 128 }, +}; + +struct tas2505_priv { + void *codec; + struct device *dev; + struct regmap *regmap; + u32 sysclk; + u32 clk_src; + u32 rate; + int rate_div_line; + int pll_clkin; + int frame_size; + u8 p_div; +}; + +static int tas2505_setup_pll(struct snd_soc_component *codec) +{ + struct tas2505_priv *tas2505 = snd_soc_component_get_drvdata(codec); + int mclk_p = tas2505->sysclk / tas2505->p_div; + struct tas2505_rate_divs *rate_divs; + int match = -1; + u8 p_div; + int i; + + if (tas2505->clk_src == MCLK) { + for (i = 0; i < ARRAY_SIZE(tas2505_divs_mclksrc); i++) { + if ( + tas2505_divs_mclksrc[i].rate == tas2505->rate && + tas2505_divs_mclksrc[i].mclk_p == mclk_p + ) { + match = i; + break; + } + } + + if (match == -1) { + dev_err(codec->dev, + "Sample rate (%u) and format not supported\n", + tas2505->rate); + return -EINVAL; + } + + tas2505->rate_div_line = match; + rate_divs = (struct tas2505_rate_divs *)tas2505_divs_mclksrc; + } else { + for (i = 0; i < ARRAY_SIZE(tas2505_divs_bclksrc); i++) { + if (tas2505_divs_bclksrc[i].rate == + tas2505->rate) { + match = i; + break; + } + } + + if (match == -1) { + dev_err(codec->dev, + "Sample rate (%u) and format not supported\n", + tas2505->rate); + return -EINVAL; + } + rate_divs = (struct tas2505_rate_divs *)tas2505_divs_bclksrc; + } + + p_div = (tas2505->p_div == 8) ? 0 : tas2505->p_div; + p_div <<= TAS2505_PLLPR_P_SHIFT; + p_div |= rate_divs[match].pll_r; + p_div |= TAS2505_PM_MASK; + + snd_soc_component_write(codec, TAS2505_PLLPR, p_div); + snd_soc_component_write(codec, TAS2505_PLLJ, + rate_divs[match].pll_j); + snd_soc_component_write(codec, TAS2505_PLLDMSB, + rate_divs[match].pll_d >> 8); + snd_soc_component_write(codec, TAS2505_PLLDLSB, + rate_divs[match].pll_d & 0xff); + mdelay(15); + snd_soc_component_write(codec, TAS2505_NDAC, + TAS2505_PM_MASK | rate_divs[match].ndac); + snd_soc_component_write(codec, TAS2505_MDAC, + TAS2505_PM_MASK | rate_divs[match].mdac); + snd_soc_component_write(codec, TAS2505_DOSRMSB, + rate_divs[match].dosr >> 8); + snd_soc_component_write(codec, TAS2505_DOSRLSB, + rate_divs[match].dosr & 0xff); + if (tas2505->clk_src != MCLK) + snd_soc_component_update_bits(codec, TAS2505_BCLKNDIV, + TAS2505_BCLKNDIV_MASK, + (rate_divs[match].dosr * rate_divs[match].mdac) / + tas2505->frame_size); + + return 0; +} + +static int tas2505_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_component *codec = dai->component; + struct tas2505_priv *tas2505 = snd_soc_component_get_drvdata(codec); + u8 data = 0; + + switch (params_width(params)) { + case 16: + break; + + case 20: + data = TAS2505_WORD_LEN_20BITS; + break; + + case 24: + data = TAS2505_WORD_LEN_24BITS; + break; + + case 32: + data = TAS2505_WORD_LEN_32BITS; + break; + + default: + dev_err(codec->dev, "Unsupported width %d\n", + params_width(params)); + return -EINVAL; + } + dev_info(codec->dev, "%s: bit width = %d\n", + __func__, params_width(params)); + data <<= TAS2505_IFACE1_DATALEN_SHIFT; + + snd_soc_component_update_bits(codec, TAS2505_IFACE1, + TAS2505_IFACE1_DATALEN_MASK, data); + tas2505->rate = params_rate(params); + tas2505->frame_size = snd_soc_params_to_frame_size(params); + + return tas2505_setup_pll(codec); +} + +static int tas2505_dac_mute(struct snd_soc_dai *dai, int mute, + int stream) +{ + struct snd_soc_component *codec = dai->component; + + if (mute) { + snd_soc_component_update_bits(codec, TAS2505_DACSETUP2, + TAS2505_DACSETUP2_MUTE_MASK, + TAS2505_DACSETUP2_MUTE_MASK); + snd_soc_component_update_bits(codec, TAS2505_DACSETUP1, + 0x80, 0x00); + } else { + snd_soc_component_update_bits(codec, TAS2505_DACSETUP1, + 0x80, 0x80); + snd_soc_component_update_bits(codec, TAS2505_DACSETUP2, + TAS2505_DACSETUP2_MUTE_MASK, 0x0); + } + + return 0; +} + +static int tas2505_set_dai_fmt(struct snd_soc_dai *codec_dai, + unsigned int fmt) +{ + struct snd_soc_component *codec = codec_dai->component; + u8 iface_reg1 = 0; + u8 iface_reg3 = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + break; + + case SND_SOC_DAIFMT_CBM_CFM: + iface_reg1 |= TAS2505_IFACE1_BCLKDIR_MASK; + iface_reg1 |= TAS2505_IFACE1_WCLKDIR_MASK; + break; + + default: + dev_err(codec->dev, + "%s SND_SOC_DAIFMT_MASTER_MASK 0x%x \n",__FUNCTION__,fmt); + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + + case SND_SOC_DAIFMT_IB_NF: + iface_reg3 |= TAS2505_IFACE3_BCLKINV_MASK; + break; + + default: + dev_err(codec->dev, + "tas2505_set_dai_fmt SND_SOC_DAIFMT_INV_MASK 0x%x \n",fmt); + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + break; + + case SND_SOC_DAIFMT_DSP_A: + case SND_SOC_DAIFMT_DSP_B: + iface_reg1 |= (TAS2505_DSP_MODE << + TAS2505_IFACE1_INTERFACE_SHIFT); + break; + + case SND_SOC_DAIFMT_RIGHT_J: + iface_reg1 |= (TAS2505_RJF_MODE << + TAS2505_IFACE1_INTERFACE_SHIFT); + break; + + case SND_SOC_DAIFMT_LEFT_J: + iface_reg1 |= (TAS2505_LJF_MODE << + TAS2505_IFACE1_INTERFACE_SHIFT); + break; + + default: + dev_err(codec->dev, "Invalid DAI interface format\n"); + return -EINVAL; + } + + snd_soc_component_write(codec, TAS2505_IFACE1, iface_reg1); + snd_soc_component_update_bits(codec, TAS2505_IFACE3, + TAS2505_IFACE3_BCLKINV_MASK | TAS2505_IFACE3_BDIVCLKIN_MASK, + iface_reg3); + + return 0; +} + +static int tas2505_set_dai_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_component *codec = codec_dai->component; + struct tas2505_priv *tas2505 = snd_soc_component_get_drvdata(codec); + int i, x; + int ret = 0; + + dev_info(tas2505->dev, "%s: clk_id: %d, freq: %d\n", + __func__, clk_id, freq); + + if (tas2505->clk_src == MCLK) { + for (i = 0; i < ARRAY_SIZE(tas2505_divs_mclksrc); i++) { + for (x = 1; x < 9; x++) { + if ((freq / x) == tas2505_divs_mclksrc[i].mclk_p) { + tas2505->p_div = x; + break; + } + } + if (x < 9) + break; + } + + if (i != ARRAY_SIZE(tas2505_divs_mclksrc)) { + } else { + dev_err(tas2505->dev, + "Can't produce required " + "PLL_CLKIN frequency\n"); + ret = -EINVAL; + } + tas2505->pll_clkin = clk_id; + } else { + tas2505->pll_clkin = 1; + tas2505->p_div = 1; + } + + if (!ret) { + snd_soc_component_write(codec, TAS2505_CLKMUX, + (tas2505->pll_clkin << TAS2505_PLL_CLKIN_SHIFT) | + TAS2505_CODEC_CLKIN_PLL); + + tas2505->sysclk = freq; + } + return ret; + +} + +static void tas2505_power_on(struct snd_soc_component *codec) +{ + snd_soc_component_update_bits(codec, TAS2505_LDO_CTRL, + TAS2505_LDO_PLL_HP_LVL_MASK, 0); + snd_soc_component_update_bits(codec, TAS2505_REF_POR_LDO_BGAP_CTRL, + TAS2505_REF_POR_LDO_BGAP_MASTER_REF_MASK, + TAS2505_REF_POR_LDO_BGAP_MASTER_REF_MASK); +} + +static void tas2505_power_off(struct snd_soc_component *codec) +{ + snd_soc_component_update_bits(codec, TAS2505_REF_POR_LDO_BGAP_CTRL, + TAS2505_REF_POR_LDO_BGAP_MASTER_REF_MASK, 0); + snd_soc_component_update_bits(codec, TAS2505_LDO_CTRL, + TAS2505_LDO_PLL_HP_LVL_MASK, + TAS2505_LDO_PLL_HP_LVL_MASK); +} + +static int tas2505_set_bias_level(struct snd_soc_component *codec, + enum snd_soc_bias_level level) +{ + int current_lvl = snd_soc_component_get_bias_level(codec); + int rc = 0; + + switch (level) { + case SND_SOC_BIAS_ON: + break; + case SND_SOC_BIAS_PREPARE: + break; + case SND_SOC_BIAS_STANDBY: + if (current_lvl == SND_SOC_BIAS_OFF) { + tas2505_power_on(codec); + dev_info(codec->dev, + "%s:power on\n", __func__); + } else + dev_info(codec->dev, + "%s:SND_SOC_BIAS_STANDBY\n", + __func__); + break; + case SND_SOC_BIAS_OFF: + if (current_lvl == SND_SOC_BIAS_STANDBY) { + tas2505_power_off(codec); + dev_info(codec->dev, + "%s:power off\n", + __func__); + } else + dev_info(codec->dev, + "%s:SND_SOC_BIAS_OFF\n", + __func__); + break; + default: + dev_err(codec->dev, "Invalid bias level\n"); + rc = -EINVAL; + } + + return rc; +} + +static int tas2505_codec_probe(struct snd_soc_component *codec) +{ + struct tas2505_priv *tas2505 = snd_soc_component_get_drvdata(codec); + + tas2505->codec = codec; + tas2505_vol.dac_vol = 0x00; + tas2505_vol.spk_vol1 = 0x00; + + snd_soc_component_write(codec, TAS2505_RESET, 1); + + return 0; +} + +static const struct snd_soc_component_driver soc_codec_driver_tas2505 = { + .probe = tas2505_codec_probe, + .set_bias_level = tas2505_set_bias_level, + .suspend_bias_off = true, + + .controls = tas2505_snd_controls, + .num_controls = ARRAY_SIZE(tas2505_snd_controls), + .dapm_widgets = tas2505_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(tas2505_dapm_widgets), + .dapm_routes = tas2505_audio_map, + .num_dapm_routes = ARRAY_SIZE(tas2505_audio_map), +}; + +static const struct snd_soc_dai_ops tas2505_dai_ops = { + .hw_params = tas2505_hw_params, + .set_sysclk = tas2505_set_dai_sysclk, + .set_fmt = tas2505_set_dai_fmt, + .mute_stream = tas2505_dac_mute, +}; + +static struct snd_soc_dai_driver tas2505_dai_driver[] = { + { + .name = "tas2505-hifi", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = TAS2505_RATES, + .formats = TAS2505_FORMATS, + }, + .ops = &tas2505_dai_ops, + .symmetric_rate = 1, + }, +}; + +static int tas2505_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct tas2505_priv *tas2505; + struct device_node *np = i2c->dev.of_node; + const struct regmap_config *regmap_config = &tas2505_i2c_regmap; + int ret; + + tas2505 = devm_kzalloc(&i2c->dev, sizeof(*tas2505), GFP_KERNEL); + if (tas2505 == NULL) + return -ENOMEM; + + tas2505->regmap = devm_regmap_init_i2c(i2c, regmap_config); + if (IS_ERR(tas2505->regmap)) { + ret = PTR_ERR(tas2505->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + ret = of_get_named_gpio(np, "gpio-reset", 0); + if ((ret > 0) && gpio_is_valid(ret)) { + devm_gpio_request_one(&i2c->dev, ret, GPIOF_OUT_INIT_HIGH, + "reset"); + } + + ret = of_property_read_u32(np, "clock-source", + &tas2505->clk_src); + + dev_info(&i2c->dev, "%s: clock-source = %s\n", __func__, + tas2505->clk_src?"BCLK":"MCLK"); + + tas2505->dev = &i2c->dev; + + dev_set_drvdata(tas2505->dev, tas2505); + + return snd_soc_register_component(&i2c->dev, + &soc_codec_driver_tas2505, tas2505_dai_driver, + ARRAY_SIZE(tas2505_dai_driver)); +} + +static void tas2505_i2c_remove(struct i2c_client *i2c) +{ + + snd_soc_unregister_component(&i2c->dev); + + //return 0; +} + +static const struct of_device_id tas2505_of_match[] = { + { .compatible = "ti,tas2505" }, + {}, +}; +MODULE_DEVICE_TABLE(of, tas2505_of_match); + +static const struct i2c_device_id tas2505_i2c_id[] = { + { "tas2505", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2ic, tas2505_i2c_id); + +static struct i2c_driver tas2505_i2c_driver = { + .driver = { + .name = "tas2505-codec", + .of_match_table = of_match_ptr(tas2505_of_match), + }, + .probe = tas2505_i2c_probe, + .remove = tas2505_i2c_remove, + .id_table = tas2505_i2c_id, +}; + +module_i2c_driver(tas2505_i2c_driver); + +MODULE_DESCRIPTION("ASoC TAS2505 codec driver"); +MODULE_AUTHOR("Hieu Tran Dang "); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/ti/tas2505.h b/sound/soc/ti/tas2505.h new file mode 100644 index 000000000000..3e55df45f894 --- /dev/null +++ b/sound/soc/ti/tas2505.h @@ -0,0 +1,104 @@ +/* + * ALSA SoC TAS2505 codec driver + * + * Author: Hieu Tran Dang + * + * This package is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * THIS PACKAGE IS PROVIDED AS IS AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +#ifndef _TAS2505_H +#define _TAS2505_H + +#define TAS2505_RATES (SNDRV_PCM_RATE_8000_96000) +#define TAS2505_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE | \ + SNDRV_PCM_FMTBIT_S32_LE) + +#define TAS2505_REG(page, reg) ((page * 128) + reg) + +#define TAS2505_PAGECTL TAS2505_REG(0, 0) +#define TAS2505_RESET TAS2505_REG(0, 1) +#define TAS2505_CLKMUX TAS2505_REG(0, 4) +#define TAS2505_PLLPR TAS2505_REG(0, 5) +#define TAS2505_PLLJ TAS2505_REG(0, 6) +#define TAS2505_PLLDMSB TAS2505_REG(0, 7) +#define TAS2505_PLLDLSB TAS2505_REG(0, 8) +#define TAS2505_NDAC TAS2505_REG(0, 11) +#define TAS2505_MDAC TAS2505_REG(0, 12) +#define TAS2505_DOSRMSB TAS2505_REG(0, 13) +#define TAS2505_DOSRLSB TAS2505_REG(0, 14) +#define TAS2505_IFACE1 TAS2505_REG(0, 27) +#define TAS2505_IFACE3 TAS2505_REG(0, 29) +#define TAS2505_BCLKNDIV TAS2505_REG(0, 30) +#define TAS2505_DACFLAG1 TAS2505_REG(0, 37) +#define TAS2505_DACFLAG2 TAS2505_REG(0, 38) +#define TAS2505_STICKYFLAG1 TAS2505_REG(0, 42) +#define TAS2505_INTFLAG1 TAS2505_REG(0, 43) +#define TAS2505_STICKYFLAG2 TAS2505_REG(0, 44) +#define TAS2505_INTFLAG2 TAS2505_REG(0, 46) +#define TAS2505_DACINSTRSET TAS2505_REG(0, 60) +#define TAS2505_DACSETUP1 TAS2505_REG(0, 63) +#define TAS2505_DACSETUP2 TAS2505_REG(0, 64) +#define TAS2505_DACVOL TAS2505_REG(0, 65) +#define TAS2505_REF_POR_LDO_BGAP_CTRL TAS2505_REG(1, 1) +#define TAS2505_LDO_CTRL TAS2505_REG(1, 2) +#define TAS2505_PLAYBACKCONF1 TAS2505_REG(1, 3) +#define TAS2505_SPKAMPCTRL1 TAS2505_REG(1, 45) +#define TAS2505_SPKVOL1 TAS2505_REG(1, 46) +#define TAS2505_SPKVOL2 TAS2505_REG(1, 48) +#define TAS2505_DACANLGAINFLAG TAS2505_REG(1, 63) + +#define TAS2505_PLLPR_P_MASK (0x70) +#define TAS2505_PLLPR_R_MASK (0xf) +#define TAS2505_PLL_DAC_MASK (0x7f) +#define TAS2505_BCLKNDIV_MASK (0x7f) +#define TAS2505_IFACE1_DATALEN_MASK (0x30) +#define TAS2505_IFACE1_WCLKDIR_MASK (0x4) +#define TAS2505_IFACE1_BCLKDIR_MASK (0x8) +#define TAS2505_IFACE1_INTERFACE_MASK (0xc0) +#define TAS2505_IFACE3_BDIVCLKIN_MASK (0x1) +#define TAS2505_IFACE3_BCLKINV_MASK (0x8) +#define TAS2505_DACSETUP1_PATH_CTRL_MSK (0x30) +#define TAS2505_DACSETUP2_MUTE_MASK (0x8) +#define TAS2505_PM_MASK (0x80) +#define TAS2505_LDO_PLL_HP_LVL_MASK (0x8) +#define TAS2505_REF_POR_LDO_BGAP_MASTER_REF_MASK (0x10) +#define TAS2505_SPKVOL2_MSK (0x70) +#define TAS2505_CODEC_CLKIN_MSK (0x3) +#define TAS2505_PLL_INPUT_CLK_MSK (0xC) +#define TAS2505_SPKAMPCTRL1_SPKDRV_MSK BIT(1) + +#define TAS2505_PLLPR_P_SHIFT (4) +#define TAS2505_PLL_CLKIN_SHIFT (2) +#define TAS2505_IFACE1_DATALEN_SHIFT (4) +#define TAS2505_IFACE1_INTERFACE_SHIFT (6) +#define TAS2505_IFACE3_BCLKINV_SHIFT (4) +#define TAS2505_SPKVOL2_6DB_SHIFT (4) +#define TAS2505_DACSETUP1_PATH_CTRL_SHIFT (4) + +#define TAS2505_WORD_LEN_20BITS (1) +#define TAS2505_WORD_LEN_24BITS (2) +#define TAS2505_WORD_LEN_32BITS (3) + +#define TAS2505_DSP_MODE (1) +#define TAS2505_RJF_MODE (2) +#define TAS2505_LJF_MODE (3) + +#define TAS2505_PLL_CLKIN_MCLK (0) +#define TAS2505_PLL_CLKIN_BCLK (1) +#define TAS2505_PLL_CLKIN_GPIO (2) +#define TAS2505_PLL_CLKIN_DIN (3) +#define TAS2505_CODEC_CLKIN_PLL (3) +#define TAS2505_SPKVOL2_MUTE (0) +#define TAS2505_SPKVOL2_6DB (1) +#define TAS2505_DACSETUP1_PATH_CTRL_LRDIV2 (3) +#define TAS2505_SPKAMPCTRL1_SPKDRV_PWD (0) +#define TAS2505_SPKAMPCTRL1_SPKDRV_PWU (1) + +#endif