;******************************************************************************
;* G3 TMS320C6x C/C++ Codegen                                       PC v8.1.0 *
;* Date/Time created: Fri Nov 04 14:57:54 2016                                *
;******************************************************************************
	.compiler_opts --abi=eabi --array_alignment=8 --endian=little --hll_source=on --long_precision_bits=32 --mem_model:code=near --mem_model:const=data --mem_model:data=far_aggregates --object_format=elf --silicon_version=6740 --symdebug:dwarf --symdebug:dwarf_version=3 

;******************************************************************************
;* GLOBAL FILE PARAMETERS                                                     *
;*                                                                            *
;*   Architecture      : TMS320C674x                                          *
;*   Optimization      : Enabled at level 3                                   *
;*   Optimizing for    : Speed 1st, size 2nd                                  *
;*                       Based on options: -o3, -ms0                          *
;*   Endian            : Little                                               *
;*   Interrupt Thrshld : Disabled                                             *
;*   Data Access Model : Far Aggregate Data                                   *
;*   Pipelining        : Enabled                                              *
;*   Speculate Loads   : Enabled with threshold = 0                           *
;*   Memory Aliases    : Presume are aliases (pessimistic)                    *
;*   Debug Info        : DWARF Debug                                          *
;*                                                                            *
;******************************************************************************

	.asg	A15, FP
	.asg	B14, DP
	.asg	B15, SP
	.global	$bss


$C$DW$CU	.dwtag  DW_TAG_compile_unit
	.dwattr $C$DW$CU, DW_AT_name("../src/matrice.c")
	.dwattr $C$DW$CU, DW_AT_producer("TI G3 TMS320C6x C/C++ Codegen PC v8.1.0 Copyright (c) 1996-2015 Texas Instruments Incorporated")
	.dwattr $C$DW$CU, DW_AT_TI_version(0x01)
	.dwattr $C$DW$CU, DW_AT_comp_dir("C:\eHDT_wk2_test\eHDT_DSP\Release")
	.global	matrice_data_input
	.farcommon	matrice_data_input,88,8
$C$DW$1	.dwtag  DW_TAG_variable
	.dwattr $C$DW$1, DW_AT_name("matrice_data_input")
	.dwattr $C$DW$1, DW_AT_TI_symbol_name("matrice_data_input")
	.dwattr $C$DW$1, DW_AT_location[DW_OP_addr matrice_data_input]
	.dwattr $C$DW$1, DW_AT_type(*$C$DW$T$51)
	.dwattr $C$DW$1, DW_AT_external
	.dwattr $C$DW$1, DW_AT_decl_file("../src/matrice.c")
	.dwattr $C$DW$1, DW_AT_decl_line(0x07)
	.dwattr $C$DW$1, DW_AT_decl_column(0x09)

	.global	matrice_data_output
	.farcommon	matrice_data_output,56,8
$C$DW$2	.dwtag  DW_TAG_variable
	.dwattr $C$DW$2, DW_AT_name("matrice_data_output")
	.dwattr $C$DW$2, DW_AT_TI_symbol_name("matrice_data_output")
	.dwattr $C$DW$2, DW_AT_location[DW_OP_addr matrice_data_output]
	.dwattr $C$DW$2, DW_AT_type(*$C$DW$T$52)
	.dwattr $C$DW$2, DW_AT_external
	.dwattr $C$DW$2, DW_AT_decl_file("../src/matrice.c")
	.dwattr $C$DW$2, DW_AT_decl_line(0x08)
	.dwattr $C$DW$2, DW_AT_decl_column(0x09)

	.global	MatriceInterne
	.farcommon	MatriceInterne,616,8
$C$DW$3	.dwtag  DW_TAG_variable
	.dwattr $C$DW$3, DW_AT_name("MatriceInterne")
	.dwattr $C$DW$3, DW_AT_TI_symbol_name("MatriceInterne")
	.dwattr $C$DW$3, DW_AT_location[DW_OP_addr MatriceInterne]
	.dwattr $C$DW$3, DW_AT_type(*$C$DW$T$42)
	.dwattr $C$DW$3, DW_AT_external
	.dwattr $C$DW$3, DW_AT_decl_file("../src/matrice.c")
	.dwattr $C$DW$3, DW_AT_decl_line(0x0e)
	.dwattr $C$DW$3, DW_AT_decl_column(0x0b)

;	C:\ti_CCS6\ccsv6\tools\compiler\ti-cgt-c6000_8.1.0\bin\opt6x.exe C:\\Users\\wangr\\AppData\\Local\\Temp\\184002 C:\\Users\\wangr\\AppData\\Local\\Temp\\184004 
	.sect	".text"
	.clink
	.global	Matrice

$C$DW$4	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$4, DW_AT_name("Matrice")
	.dwattr $C$DW$4, DW_AT_low_pc(Matrice)
	.dwattr $C$DW$4, DW_AT_high_pc(0x00)
	.dwattr $C$DW$4, DW_AT_TI_symbol_name("Matrice")
	.dwattr $C$DW$4, DW_AT_external
	.dwattr $C$DW$4, DW_AT_TI_begin_file("../src/matrice.c")
	.dwattr $C$DW$4, DW_AT_TI_begin_line(0x38)
	.dwattr $C$DW$4, DW_AT_TI_begin_column(0x06)
	.dwattr $C$DW$4, DW_AT_decl_file("../src/matrice.c")
	.dwattr $C$DW$4, DW_AT_decl_line(0x38)
	.dwattr $C$DW$4, DW_AT_decl_column(0x06)
	.dwattr $C$DW$4, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../src/matrice.c",line 57,column 1,is_stmt,address Matrice,isa 0

	.dwfde $C$DW$CIE, Matrice

;******************************************************************************
;* FUNCTION NAME: Matrice                                                     *
;*                                                                            *
;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,B0,B1,B2,B3,B4,B5,B31           *
;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,B0,B1,B2,B3,B4,B5,B31           *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************
Matrice:
;** --------------------------------------------------------------------------*
$C$DW$5	.dwtag  DW_TAG_variable
	.dwattr $C$DW$5, DW_AT_name("k")
	.dwattr $C$DW$5, DW_AT_TI_symbol_name("k")
	.dwattr $C$DW$5, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$5, DW_AT_location[DW_OP_reg4]

$C$DW$6	.dwtag  DW_TAG_variable
	.dwattr $C$DW$6, DW_AT_name("accumulator")
	.dwattr $C$DW$6, DW_AT_TI_symbol_name("accumulator")
	.dwattr $C$DW$6, DW_AT_type(*$C$DW$T$50)
	.dwattr $C$DW$6, DW_AT_location[DW_OP_reg1]

$C$DW$7	.dwtag  DW_TAG_variable
	.dwattr $C$DW$7, DW_AT_name("$O$L2")
	.dwattr $C$DW$7, DW_AT_TI_symbol_name("$O$L2")
	.dwattr $C$DW$7, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$7, DW_AT_location[DW_OP_regx 0x44]

$C$DW$8	.dwtag  DW_TAG_variable
	.dwattr $C$DW$8, DW_AT_name("$O$L1")
	.dwattr $C$DW$8, DW_AT_TI_symbol_name("$O$L1")
	.dwattr $C$DW$8, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$8, DW_AT_location[DW_OP_reg18]

$C$DW$9	.dwtag  DW_TAG_variable
	.dwattr $C$DW$9, DW_AT_name("$O$U5")
	.dwattr $C$DW$9, DW_AT_TI_symbol_name("$O$U5")
	.dwattr $C$DW$9, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$9, DW_AT_location[DW_OP_reg2]

$C$DW$10	.dwtag  DW_TAG_variable
	.dwattr $C$DW$10, DW_AT_name("$O$U30")
	.dwattr $C$DW$10, DW_AT_TI_symbol_name("$O$U30")
	.dwattr $C$DW$10, DW_AT_type(*$C$DW$T$48)
	.dwattr $C$DW$10, DW_AT_location[DW_OP_reg6]

$C$DW$11	.dwtag  DW_TAG_variable
	.dwattr $C$DW$11, DW_AT_name("$O$U11")
	.dwattr $C$DW$11, DW_AT_TI_symbol_name("$O$U11")
	.dwattr $C$DW$11, DW_AT_type(*$C$DW$T$36)
	.dwattr $C$DW$11, DW_AT_location[DW_OP_reg20]

	.dwcfi	cfa_offset, 0
;          EXCLUSIVE CPU CYCLES: 2
;** 62	-----------------------    L$1 = 14;
;**  	-----------------------    U$30 = &matrice_data_output[0];
;**  	-----------------------    U$5 = 0;
;**  	-----------------------    #pragma MUST_ITERATE(14, 14, 14)
;**  	-----------------------    #pragma LOOP_FLAGS(4096u)
           MVKL    .S1     matrice_data_output,A6 ; [A_S674] 

           MVKH    .S1     matrice_data_output,A6 ; [A_S674] 
||         MVK     .L2     14,B2             ; [B_L674] |62| 
||         ZERO    .L1     A2                ; [A_L674] 
||         MV      .D1X    B3,A3             ; [A_D64P] |57| 
||         MVK     .S2     0x16,B31          ; [B_Sb674] |67| 

	.dwcfi	save_reg_to_reg, 19, 3
;** --------------------------------------------------------------------------*
;**   BEGIN LOOP $C$L1
;** --------------------------------------------------------------------------*
$C$L1:    
;          EXCLUSIVE CPU CYCLES: 3
;**	-----------------------g2:
;**  	-----------------------    U$11 = &MatriceInterne+U$5;
;** 67	-----------------------    L$2 = 22;
;** 65	-----------------------    accumulator = 0;
;**  	-----------------------    k = 0;
;**  	-----------------------    #pragma MUST_ITERATE(22, 22, 22)
;**  	-----------------------    #pragma LOOP_FLAGS(4096u)
;**	-----------------------g3:
;** 70	-----------------------    if ( *U$11++ != 1 ) goto g5;
;** 72	-----------------------    accumulator += matrice_data_input[k];
;**	-----------------------g5:
;** 67	-----------------------    ++k;
;** 67	-----------------------    if ( !__builtin_expect((long)!(L$2 = L$2-1), 0L) ) goto g3;

           MVKL    .S2     MatriceInterne,B0 ; [B_Sb674] 
||         SUB     .L2     B31,4,B4          ; [B_L674] 

           MVC     .S2     B4,ILC            ; [B_Sb674] 
           MVKH    .S2     MatriceInterne,B0 ; [B_Sb674] 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop found in file               : ../src/matrice.c
;*      Loop source line                 : 67
;*      Loop opening brace source line   : 69
;*      Loop closing brace source line   : 74
;*      Known Minimum Trip Count         : 22                    
;*      Known Maximum Trip Count         : 22                    
;*      Known Max Trip Count Factor      : 22
;*      Loop Carried Dependency Bound(^) : 1
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        1*    
;*      .S units                     0        0     
;*      .D units                     1*       1*    
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1        1     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             0        1*    
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 1  Schedule found with 12 iterations in parallel
;*
;*      Register Usage Table:
;*          +-----------------------------------------------------------------+
;*          |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
;*          |00000000001111111111222222222233|00000000001111111111222222222233|
;*          |01234567890123456789012345678901|01234567890123456789012345678901|
;*          |--------------------------------+--------------------------------|
;*       0: |**  **                          |** ***                          |
;*          +-----------------------------------------------------------------+
;*
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 0
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*      Min. prof. trip count  (est.) : 2
;*
;*      Mem bank conflicts/iter(est.) : { min 0.000, est 0.125, max 1.000 }
;*      Mem bank perf. penalty (est.) : 11.1%
;*
;*      Effective ii                : { min 1.00, est 1.13, max 2.00 }
;*
;*
;*      Total cycles (est.)         : 11 + min_trip_cnt * 1 = 33        
;*----------------------------------------------------------------------------*
;*        SINGLE SCHEDULED ITERATION
;*
;*        $C$C43:
;*   0              LDHU    .D2T2   *B4++(2),B3       ; [B_D64P] |70| 
;*   1              NOP     4       ; [A_L674] 
;*   5              CMPEQ   .L2     B3,1,B1           ; [B_L674] |70| 
;*   6              MV      .S2     B1,B5             ; [B_Sb674] |70| Split a long life
;*     ||   [ B1]   LDW     .D1T1   *+A5[A4],A0       ; [A_D64P] |72|  ^ 
;*     ||           ADD     .S1     1,A4,A4           ; [A_S674] |67|  ^ 
;*   7              MVD     .M2     B5,B0             ; [B_M674] |70| Split a long life
;*   8              NOP     3       ; [A_L674] 
;*  11      [ B0]   ADD     .L1     A0,A1,A1          ; [A_L674] |72| 
;*     ||           SPBR                              $C$C43 ; [] 
;*  12              ; BRANCHCC OCCURS {$C$C43}        ; [] |67| 
;*
;*      (Performance) If you know that this loop will always execute at a
;*          multiple of <44> and at least <44> times, try adding "#pragma
;*          MUST_ITERATE(44, ,44)" just before the loop.
;*----------------------------------------------------------------------------*
$C$L2:    ; PIPED LOOP PROLOG
;          EXCLUSIVE CPU CYCLES: 12

           SPLOOPD         1                 ;12 ; [A_L674] (P) 
||         ADD     .L2X    B0,A2,B4          ; [B_L674] 

;** --------------------------------------------------------------------------*
$C$L3:    ; PIPED LOOP KERNEL
;          EXCLUSIVE CPU CYCLES: 1
	.dwpsn	file "../src/matrice.c",line 70,column 13,is_stmt,isa 0
           LDHU    .D2T2   *B4++(2),B3       ; [B_D64P] |70| (P) <0,0> 
           NOP             3                 ; [A_L674] 
	.dwpsn	file "../src/matrice.c",line 72,column 14,is_stmt,isa 0

           SPMASK                            ; [] 
||^        MVKL    .S1     matrice_data_input,A5 ; [A_S674] |72| 

	.dwpsn	file "../src/matrice.c",line 65,column 9,is_stmt,isa 0

           SPMASK                            ; [] 
||^        ZERO    .L1     A4                ; [A_L674] |65| 
||^        MVKH    .S1     matrice_data_input,A5 ; [A_S674] |72| 
||         CMPEQ   .L2     B3,1,B1           ; [B_L674] |70| (P) <0,5> 

	.dwpsn	file "../src/matrice.c",line 67,column 15,is_stmt,isa 0

           MV      .S2     B1,B5             ; [B_Sb674] |70| (P) <0,6> Split a long life
||         ADD     .S1     1,A4,A4           ; [A_S674] |67| (P) <0,6>  ^ 
|| [ B1]   LDW     .D1T1   *+A5[A4],A0       ; [A_D64P] |72| (P) <0,6>  ^ 

	.dwpsn	file "../src/matrice.c",line 70,column 13,is_stmt,isa 0
           MVD     .M2     B5,B0             ; [B_M674] |70| (P) <0,7> Split a long life
           NOP             2                 ; [A_L674] 
	.dwpsn	file "../src/matrice.c",line 65,column 9,is_stmt,isa 0

           SPMASK                            ; [] 
||^        ZERO    .L1     A1                ; [A_L674] |65| 

	.dwpsn	file "../src/matrice.c",line 72,column 14,is_stmt,isa 0

           SPKERNEL        0,0               ; [] 
|| [ B0]   ADD     .L1     A0,A1,A1          ; [A_L674] |72| <0,11> 

;** --------------------------------------------------------------------------*
$C$L4:    ; PIPED LOOP EPILOG
;          EXCLUSIVE CPU CYCLES: 12
;** 75	-----------------------    *U$30++ = accumulator;
;** 62	-----------------------    U$5 += 44;
;** 62	-----------------------    if ( L$1 = L$1-1 ) goto g2;
;**  	-----------------------    return;
	.dwpsn	file "../src/matrice.c",line 62,column 11,is_stmt,isa 0
           SUB     .D2     B2,1,B2           ; [B_D64P] |62| 
           NOP             5                 ; [A_L674] 

   [ B2]   BNOP            $C$L1,3           ; [] |62| 
||         ADDAW   .D1     A2,11,A2          ; [A_D64P] |62| 

           MVK     .S1     44,A0             ; [A_S674] |62| 
	.dwpsn	file "../src/matrice.c",line 75,column 9,is_stmt,isa 0
           STW     .D1T1   A1,*A6++(4)       ; [A_D64P] |75| 
	.dwpsn	file "../src/matrice.c",line 62,column 11,is_stmt,isa 0
           ; BRANCHCC OCCURS {$C$L1}         ; [] |62| 
;** --------------------------------------------------------------------------*
;          EXCLUSIVE CPU CYCLES: 6
	.dwpsn	file "../src/matrice.c",line 77,column 1,is_stmt,isa 0
$C$DW$12	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$12, DW_AT_low_pc(0x00)
	.dwattr $C$DW$12, DW_AT_TI_return

           RETNOP          A3,5              ; [] |77| 
           ; BRANCH OCCURS {A3}              ; [] |77| 
	.dwattr $C$DW$4, DW_AT_TI_end_file("../src/matrice.c")
	.dwattr $C$DW$4, DW_AT_TI_end_line(0x4d)
	.dwattr $C$DW$4, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$4


;******************************************************************************
;* BUILD ATTRIBUTES                                                           *
;******************************************************************************
	.battr "TI", Tag_File, 1, Tag_Long_Precision_Bits(2)
	.battr "TI", Tag_File, 1, Tag_Bitfield_layout(2)
	.battr "TI", Tag_File, 1, Tag_ABI_enum_size(3)
	.battr "c6xabi", Tag_File, 1, Tag_ABI_wchar_t(1)
	.battr "c6xabi", Tag_File, 1, Tag_ABI_array_object_alignment(0)
	.battr "c6xabi", Tag_File, 1, Tag_ABI_array_object_align_expected(0)
	.battr "c6xabi", Tag_File, 1, Tag_ABI_PIC(0)
	.battr "c6xabi", Tag_File, 1, Tag_ABI_PID(0)
	.battr "c6xabi", Tag_File, 1, Tag_ABI_DSBT(0)
	.battr "c6xabi", Tag_File, 1, Tag_ABI_stack_align_needed(0)
	.battr "c6xabi", Tag_File, 1, Tag_ABI_stack_align_preserved(0)
	.battr "TI", Tag_File, 1, Tag_Tramps_Use_SOC(1)

;******************************************************************************
;* TYPE INFORMATION                                                           *
;******************************************************************************

$C$DW$T$20	.dwtag  DW_TAG_structure_type
	.dwattr $C$DW$T$20, DW_AT_byte_size(0x18)
$C$DW$13	.dwtag  DW_TAG_member
	.dwattr $C$DW$13, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$13, DW_AT_name("fd")
	.dwattr $C$DW$13, DW_AT_TI_symbol_name("fd")
	.dwattr $C$DW$13, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$13, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$13, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
	.dwattr $C$DW$13, DW_AT_decl_line(0x49)
	.dwattr $C$DW$13, DW_AT_decl_column(0x0b)

$C$DW$14	.dwtag  DW_TAG_member
	.dwattr $C$DW$14, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$14, DW_AT_name("buf")
	.dwattr $C$DW$14, DW_AT_TI_symbol_name("buf")
	.dwattr $C$DW$14, DW_AT_data_member_location[DW_OP_plus_uconst 0x4]
	.dwattr $C$DW$14, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$14, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
	.dwattr $C$DW$14, DW_AT_decl_line(0x4a)
	.dwattr $C$DW$14, DW_AT_decl_column(0x16)

$C$DW$15	.dwtag  DW_TAG_member
	.dwattr $C$DW$15, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$15, DW_AT_name("pos")
	.dwattr $C$DW$15, DW_AT_TI_symbol_name("pos")
	.dwattr $C$DW$15, DW_AT_data_member_location[DW_OP_plus_uconst 0x8]
	.dwattr $C$DW$15, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$15, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
	.dwattr $C$DW$15, DW_AT_decl_line(0x4b)
	.dwattr $C$DW$15, DW_AT_decl_column(0x16)

$C$DW$16	.dwtag  DW_TAG_member
	.dwattr $C$DW$16, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$16, DW_AT_name("bufend")
	.dwattr $C$DW$16, DW_AT_TI_symbol_name("bufend")
	.dwattr $C$DW$16, DW_AT_data_member_location[DW_OP_plus_uconst 0xc]
	.dwattr $C$DW$16, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$16, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
	.dwattr $C$DW$16, DW_AT_decl_line(0x4c)
	.dwattr $C$DW$16, DW_AT_decl_column(0x16)

$C$DW$17	.dwtag  DW_TAG_member
	.dwattr $C$DW$17, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$17, DW_AT_name("buff_stop")
	.dwattr $C$DW$17, DW_AT_TI_symbol_name("buff_stop")
	.dwattr $C$DW$17, DW_AT_data_member_location[DW_OP_plus_uconst 0x10]
	.dwattr $C$DW$17, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$17, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
	.dwattr $C$DW$17, DW_AT_decl_line(0x4d)
	.dwattr $C$DW$17, DW_AT_decl_column(0x16)

$C$DW$18	.dwtag  DW_TAG_member
	.dwattr $C$DW$18, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$18, DW_AT_name("flags")
	.dwattr $C$DW$18, DW_AT_TI_symbol_name("flags")
	.dwattr $C$DW$18, DW_AT_data_member_location[DW_OP_plus_uconst 0x14]
	.dwattr $C$DW$18, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$18, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
	.dwattr $C$DW$18, DW_AT_decl_line(0x4e)
	.dwattr $C$DW$18, DW_AT_decl_column(0x16)

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$C$DW$T$33	.dwtag  DW_TAG_typedef
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$C$DW$T$40	.dwtag  DW_TAG_typedef
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$C$DW$T$81	.dwtag  DW_TAG_typedef
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$C$DW$T$84	.dwtag  DW_TAG_typedef
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$C$DW$T$86	.dwtag  DW_TAG_typedef
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$C$DW$T$87	.dwtag  DW_TAG_typedef
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$C$DW$T$100	.dwtag  DW_TAG_array_type
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$C$DW$24	.dwtag  DW_TAG_subrange_type
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$C$DW$T$101	.dwtag  DW_TAG_array_type
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$C$DW$T$102	.dwtag  DW_TAG_array_type
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$C$DW$T$103	.dwtag  DW_TAG_array_type
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;***************************************************************
;* DWARF CIE ENTRIES                                           *
;***************************************************************

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