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-ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_cbas_clip/design/transport_layer/code/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_fp_utilities/design/aip_therm/code/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_fp_utilities/design/aip_v3/code/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_prototype/code/cm5190/core2_op_sys/code/drivers/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_utilities/code/crc/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_autocode_tools/design/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_inverter_cntrl/code/mtr_spd_pos/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_utilities/code/filters/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2/code/as_base/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_prototype/code/cm5190/cm840_base/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_utilities/code/mux/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_emach_mgr/code/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_prototype/code/cm5190/core2_cxps_clip_sys/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_utilities/code/powerpc_math_utilities/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_prototype/code/cm5190/core2_op_sys/code/stubs/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_prototype/code/auto_build_code/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_prototype/code/cm5190/core2_op_sys/code/powerdown/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_cbas_clip/design/session_layer/code/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_prototype/code/cm5190/core2_utilities/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_prototype/code/cm5190/core2_op_sys/code/powerup/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_com_mgr/design/code/ -ID:/CCRC_views/HPEM_CM5190_32.00.01.20_C2BL_CCSv5/vob/core2_cbas_j1939/design/cbas_j1939/code/ -DLITTLE_ENDIAN_DECREE -DTI_ARCH -DINTEL_ARCH -DPROCESSOR_TYPE_C16S16I16L32N16F1 --preinclude infrastructure.h --temp_directory=D:\CCRC_V~1\HPEM_C~2.20_\DEFAUL~1\temp --asm_directory=D:\CCRC_V~1\HPEM_C~2.20_\DEFAUL~1\temp --pp_directory=D:\CCRC_V~1\HPEM_C~2.20_\DEFAUL~1\temp --list_directory=D:\CCRC_V~1\HPEM_C~2.20_\DEFAUL~1\temp --obj_directory=D:\CCRC_V~1\HPEM_C~2.20_\DEFAUL~1\temp "
-ccs.setLinkerOptions " -e=_OS_main_entry -stack=0x400 "