#pragma CHECK_MISRA("none") typedef signed char int8_t; typedef unsigned char uint8_t; typedef short int16_t; typedef unsigned short uint16_t; typedef int int32_t; typedef unsigned int uint32_t; typedef long long int64_t; typedef unsigned long long uint64_t; typedef int8_t int_least8_t; typedef uint8_t uint_least8_t; typedef int16_t int_least16_t; typedef uint16_t uint_least16_t; typedef int32_t int_least32_t; typedef uint32_t uint_least32_t; typedef int64_t int_least64_t; typedef uint64_t uint_least64_t; typedef int32_t int_fast8_t; typedef uint32_t uint_fast8_t; typedef int32_t int_fast16_t; typedef uint32_t uint_fast16_t; typedef int32_t int_fast32_t; typedef uint32_t uint_fast32_t; typedef int64_t int_fast64_t; typedef uint64_t uint_fast64_t; typedef int intptr_t; typedef unsigned int uintptr_t; typedef long long intmax_t; typedef unsigned long long uintmax_t; typedef uint64_t uint64; typedef uint32_t uint32; typedef uint16_t uint16; typedef uint8_t uint8; typedef _Bool boolean; typedef int64_t sint64; typedef int32_t sint32; typedef int16_t sint16; typedef int8_t sint8; typedef float float32; typedef double float64; typedef uint8 Std_ReturnType; typedef struct { uint16 vendorID; uint16 moduleID; uint8 instanceID; uint8 sw_major_version; uint8 sw_minor_version; uint8 sw_patch_version; } Std_VersionInfoType; typedef unsigned char StatusType; typedef boolean tBoolean; typedef enum loopBackType { Digital_Lbk = 0U, Analog_Lbk = 1U }loopBackType_t; typedef enum config_value_type { InitialValue, CurrentValue }config_value_type_t; typedef volatile struct gioBase { uint32 GCR0; uint32 rsvd; uint32 INTDET; uint32 POL; uint32 ENASET; uint32 ENACLR; uint32 LVLSET; uint32 LVLCLR; uint32 FLG; uint32 OFF1; uint32 OFF2; uint32 EMU1; uint32 EMU2; } gioBASE_t; typedef volatile struct gioPort { uint32 DIR; uint32 DIN; uint32 DOUT; uint32 DSET; uint32 DCLR; uint32 PDR; uint32 PULDIS; uint32 PSL; } gioPORT_t; typedef volatile struct hetBase { uint32 GCR; uint32 PFR; uint32 ADDR; uint32 OFF1; uint32 OFF2; uint32 INTENAS; uint32 INTENAC; uint32 EXC1; uint32 EXC2; uint32 PRY; uint32 FLG; uint32 AND; uint32 rsvd1; uint32 HRSH; uint32 XOR; uint32 REQENS; uint32 REQENC; uint32 REQDS; uint32 rsvd2; uint32 DIR; uint32 DIN; uint32 DOUT; uint32 DSET; uint32 DCLR; uint32 PDR; uint32 PULDIS; uint32 PSL; uint32 rsvd3; uint32 rsvd4; uint32 PCR; uint32 PAR; uint32 PPR; uint32 SFPRLD; uint32 SFENA; uint32 rsvd5; uint32 LBPSEL; uint32 LBPDIR; uint32 PINDIS; } hetBASE_t; typedef volatile struct hetInstructionBase { uint32 Program; uint32 Control; uint32 Data; uint32 rsvd1; } hetINSTRUCTION_t; typedef volatile struct het1RamBase { hetINSTRUCTION_t Instruction[160U]; } hetRAMBASE_t; #pragma diag_push #pragma CHECK_MISRA("-6.3") #pragma CHECK_MISRA("-19.1") #pragma CHECK_MISRA("-20.1") #pragma CHECK_MISRA("-20.2") typedef unsigned size_t; #pragma diag_push #pragma CHECK_MISRA("-19.4") #pragma diag_pop #pragma diag_push #pragma CHECK_MISRA("-19.4") #pragma diag_pop size_t strlen(const char *string); char *strcpy(char *dest, const char *src); char *strncpy(char *dest, const char *src, size_t n); char *strcat(char *string1, const char *string2); char *strncat(char *dest, const char *src, size_t n); char *strchr(const char *string, int c); char *strrchr(const char *string, int c); int strcmp(const char *string1, const char *string2); int strncmp(const char *string1, const char *string2, size_t n); int strcoll(const char *string1, const char *_string2); size_t strxfrm(char *to, const char *from, size_t n); char *strpbrk(const char *string, const char *chs); size_t strspn(const char *string, const char *chs); size_t strcspn(const char *string, const char *chs); char *strstr(const char *string1, const char *string2); char *strtok(char *str1, const char *str2); char *strerror(int _errno); char *strdup(const char *string); void *memmove(void *s1, const void *s2, size_t n); #pragma diag_push #pragma CHECK_MISRA("-16.4") void *memcpy(void *s1, const void *s2, size_t n); #pragma diag_pop int memcmp(const void *cs, const void *ct, size_t n); void *memchr(const void *cs, int c, size_t n); void *memset(void *mem, int ch, size_t length); #pragma diag_pop #pragma diag_push #pragma CHECK_MISRA("-19.15") #pragma diag_pop enum hetPinSelect { PIN_HET_0 = 0U, PIN_HET_1 = 1U, PIN_HET_2 = 2U, PIN_HET_3 = 3U, PIN_HET_4 = 4U, PIN_HET_5 = 5U, PIN_HET_6 = 6U, PIN_HET_7 = 7U, PIN_HET_8 = 8U, PIN_HET_9 = 9U, PIN_HET_10 = 10U, PIN_HET_11 = 11U, PIN_HET_12 = 12U, PIN_HET_13 = 13U, PIN_HET_14 = 14U, PIN_HET_15 = 15U, PIN_HET_16 = 16U, PIN_HET_17 = 17U, PIN_HET_18 = 18U, PIN_HET_19 = 19U, PIN_HET_20 = 20U, PIN_HET_21 = 21U, PIN_HET_22 = 22U, PIN_HET_23 = 23U, PIN_HET_24 = 24U, PIN_HET_25 = 25U, PIN_HET_26 = 26U, PIN_HET_27 = 27U, PIN_HET_28 = 28U, PIN_HET_29 = 29U, PIN_HET_30 = 30U, PIN_HET_31 = 31U }; typedef struct hetSignal { uint32 duty; float64 period; } hetSIGNAL_t; typedef struct het_config_reg { uint32 CONFIG_GCR; uint32 CONFIG_PFR; uint32 CONFIG_INTENAS; uint32 CONFIG_INTENAC; uint32 CONFIG_PRY; uint32 CONFIG_AND; uint32 CONFIG_HRSH; uint32 CONFIG_XOR; uint32 CONFIG_DIR; uint32 CONFIG_PDR; uint32 CONFIG_PULDIS; uint32 CONFIG_PSL; uint32 CONFIG_PCR; } het_config_reg_t; void hetInit(void); void pwmStart(hetRAMBASE_t * hetRAM,uint32 pwm); void pwmStop(hetRAMBASE_t * hetRAM,uint32 pwm); void pwmSetDuty(hetRAMBASE_t * hetRAM,uint32 pwm, uint32 pwmDuty); void pwmSetSignal(hetRAMBASE_t * hetRAM,uint32 pwm, hetSIGNAL_t signal); void pwmGetSignal(hetRAMBASE_t * hetRAM,uint32 pwm, hetSIGNAL_t *signal); void pwmEnableNotification(hetBASE_t * hetREG,uint32 pwm, uint32 notification); void pwmDisableNotification(hetBASE_t * hetREG,uint32 pwm, uint32 notification); void pwmNotification(hetBASE_t * hetREG,uint32 pwm, uint32 notification); void edgeResetCounter(hetRAMBASE_t * hetRAM,uint32 edge); uint32 edgeGetCounter(hetRAMBASE_t * hetRAM,uint32 edge); void edgeEnableNotification(hetBASE_t * hetREG,uint32 edge); void edgeDisableNotification(hetBASE_t * hetREG,uint32 edge); void edgeNotification(hetBASE_t * hetREG,uint32 edge); void capGetSignal(hetRAMBASE_t * hetRAM, uint32 cap, hetSIGNAL_t *signal); void hetResetTimestamp(hetRAMBASE_t * hetRAM); uint32 hetGetTimestamp(hetRAMBASE_t * hetRAM); void het1GetConfigValue(het_config_reg_t *config_reg, config_value_type_t type); void het2GetConfigValue(het_config_reg_t *config_reg, config_value_type_t type); void hetNotification(hetBASE_t *het, uint32 offset); typedef struct gio_config_reg { uint32 CONFIG_INTDET; uint32 CONFIG_POL; uint32 CONFIG_INTENASET; uint32 CONFIG_LVLSET; uint32 CONFIG_PORTADIR; uint32 CONFIG_PORTAPDR; uint32 CONFIG_PORTAPSL; uint32 CONFIG_PORTAPULDIS; uint32 CONFIG_PORTBDIR; uint32 CONFIG_PORTBPDR; uint32 CONFIG_PORTBPSL; uint32 CONFIG_PORTBPULDIS; }gio_config_reg_t; void gioInit(void); void gioSetDirection(gioPORT_t *port, uint32 dir); void gioSetBit(gioPORT_t *port, uint32 bit, uint32 value); void gioSetPort(gioPORT_t *port, uint32 value); uint32 gioGetBit(gioPORT_t *port, uint32 bit); uint32 gioGetPort(gioPORT_t *port); void gioToggleBit(gioPORT_t *port, uint32 bit); void gioEnableNotification(gioPORT_t *port, uint32 bit); void gioDisableNotification(gioPORT_t *port, uint32 bit); void gioNotification(gioPORT_t *port, uint32 bit); void gioGetConfigValue(gio_config_reg_t *config_reg, config_value_type_t type); typedef volatile struct spiBase { uint32 GCR0; uint32 GCR1; uint32 INT0; uint32 LVL; uint32 FLG; uint32 PC0; uint32 PC1; uint32 PC2; uint32 PC3; uint32 PC4; uint32 PC5; uint32 PC6; uint32 PC7; uint32 PC8; uint32 DAT0; uint32 DAT1; uint32 BUF; uint32 EMU; uint32 DELAY; uint32 DEF; uint32 FMT0; uint32 FMT1; uint32 FMT2; uint32 FMT3; uint32 INTVECT0; uint32 INTVECT1; uint32 RESERVED[51U]; uint32 IOLPKTSTCR; } spiBASE_t; enum spiChipSelect { SPI_CS_NONE = 0xFFU, SPI_CS_0 = 0xFEU, SPI_CS_1 = 0xFDU, SPI_CS_2 = 0xFBU, SPI_CS_3 = 0xF7U, SPI_CS_4 = 0xEFU, SPI_CS_5 = 0xDFU, SPI_CS_6 = 0xBFU, SPI_CS_7 = 0x7FU }; enum spiPinSelect { SPI_PIN_CS0 = 0U, SPI_PIN_CS1 = 1U, SPI_PIN_CS2 = 2U, SPI_PIN_CS3 = 3U, SPI_PIN_CS4 = 4U, SPI_PIN_CS5 = 5U, SPI_PIN_CS6 = 6U, SPI_PIN_CS7 = 7U, SPI_PIN_ENA = 8U, SPI_PIN_CLK = 9U, SPI_PIN_SIMO = 10U, SPI_PIN_SOMI = 11U, SPI_PIN_SIMO_1 = 17U, SPI_PIN_SIMO_2 = 18U, SPI_PIN_SIMO_3 = 19U, SPI_PIN_SIMO_4 = 20U, SPI_PIN_SIMO_5 = 21U, SPI_PIN_SIMO_6 = 22U, SPI_PIN_SIMO_7 = 23U, SPI_PIN_SOMI_1 = 25U, SPI_PIN_SOMI_2 = 26U, SPI_PIN_SOMI_3 = 27U, SPI_PIN_SOMI_4 = 28U, SPI_PIN_SOMI_5 = 29U, SPI_PIN_SOMI_6 = 30U, SPI_PIN_SOMI_7 = 31U }; typedef enum dataformat { SPI_FMT_0 = 0U, SPI_FMT_1 = 1U, SPI_FMT_2 = 2U, SPI_FMT_3 = 3U }SPIDATAFMT_t; typedef struct spiDAT1RegConfig { boolean CS_HOLD; boolean WDEL; SPIDATAFMT_t DFSEL; uint8 CSNR; }spiDAT1_t; typedef enum SpiTxRxDataStatus { SPI_READY = 0U, SPI_PENDING = 1U, SPI_COMPLETED = 2U }SpiDataStatus_t; typedef struct spi_config_reg { uint32 CONFIG_GCR1; uint32 CONFIG_INT0; uint32 CONFIG_LVL; uint32 CONFIG_PC0; uint32 CONFIG_PC1; uint32 CONFIG_PC6; uint32 CONFIG_PC7; uint32 CONFIG_PC8; uint32 CONFIG_DELAY; uint32 CONFIG_FMT0; uint32 CONFIG_FMT1; uint32 CONFIG_FMT2; uint32 CONFIG_FMT3; }spi_config_reg_t; void spiInit(void); void spiSetFunctional(spiBASE_t *spi, uint32 port); void spiEnableNotification(spiBASE_t *spi, uint32 flags); void spiDisableNotification(spiBASE_t *spi, uint32 flags); uint32 spiTransmitData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff); void spiSendData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff); uint32 spiReceiveData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * destbuff); void spiGetData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * destbuff); uint32 spiTransmitAndReceiveData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff, uint16 * destbuff); void spiSendAndGetData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff, uint16 * destbuff); void spiEnableLoopback(spiBASE_t *spi, loopBackType_t Loopbacktype); void spiDisableLoopback(spiBASE_t *spi); SpiDataStatus_t SpiTxStatus(spiBASE_t *spi); SpiDataStatus_t SpiRxStatus(spiBASE_t *spi); void spiNotification(spiBASE_t *spi, uint32 flags); void spiEndNotification(spiBASE_t *spi); typedef volatile struct adcBase { uint32 RSTCR; uint32 OPMODECR; uint32 CLOCKCR; uint32 CALCR; uint32 GxMODECR[3U]; uint32 EVSRC; uint32 G1SRC; uint32 G2SRC; uint32 GxINTENA[3U]; uint32 GxINTFLG[3U]; uint32 GxINTCR[3U]; uint32 EVDMACR; uint32 G1DMACR; uint32 G2DMACR; uint32 BNDCR; uint32 BNDEND; uint32 EVSAMP; uint32 G1SAMP; uint32 G2SAMP; uint32 EVSR; uint32 G1SR; uint32 G2SR; uint32 GxSEL[3U]; uint32 CALR; uint32 SMSTATE; uint32 LASTCONV; struct { uint32 BUF0; uint32 BUF1; uint32 BUF2; uint32 BUF3; uint32 BUF4; uint32 BUF5; uint32 BUF6; uint32 BUF7; } GxBUF[3U]; uint32 EVEMUBUFFER; uint32 G1EMUBUFFER; uint32 G2EMUBUFFER; uint32 EVTDIR; uint32 EVTOUT; uint32 EVTIN; uint32 EVTSET; uint32 EVTCLR; uint32 EVTPDR; uint32 EVTDIS; uint32 EVTPSEL; uint32 EVSAMPDISEN; uint32 G1SAMPDISEN; uint32 G2SAMPDISEN; uint32 MAGINTCR1; uint32 MAGINT1MASK; uint32 MAGINTCR2; uint32 MAGINT2MASK; uint32 MAGINTCR3; uint32 MAGINT3MASK; uint32 rsvd1; uint32 rsvd2; uint32 rsvd3; uint32 rsvd4; uint32 rsvd5; uint32 rsvd6; uint32 MAGTHRINTENASET; uint32 MAGTHRINTENACLR; uint32 MAGTHRINTFLG; uint32 MAGTHRINTOFFSET; uint32 GxFIFORESETCR[3U]; uint32 EVRAMADDR; uint32 G1RAMADDR; uint32 G2RAMADDR; uint32 PARCR; uint32 PARADDR; uint32 PWRUPDLYCTRL; uint32 rsvd7; uint32 ADEVCHNSELMODECTRL; uint32 ADG1CHNSELMODECTRL; uint32 ADG2CHNSELMODECTRL; uint32 ADEVCURRCOUNT; uint32 ADEVMAXCOUNT; uint32 ADG1CURRCOUNT; uint32 ADG1MAXCOUNT; uint32 ADG2CURRCOUNT; uint32 ADG2MAXCOUNT; } adcBASE_t; typedef struct adcLUTEntry { uint16 rsvd; uint8 EV_EXT_CHN_MUX_SEL; uint8 EV_INT_CHN_MUX_SEL; }adcLUTEntry_t; typedef volatile struct adcLUT { adcLUTEntry_t eventGroup[32]; adcLUTEntry_t Group1[32]; adcLUTEntry_t Group2[32]; } adcLUT_t; enum adcResolution { ADC_12_BIT = 0x00000000U, ADC_10_BIT = 0x00000100U, ADC_8_BIT = 0x00000200U }; enum adcFiFoStatus { ADC_FIFO_IS_NOT_FULL = 0U, ADC_FIFO_IS_FULL = 1U, ADC_FIFO_OVERFLOW = 3U }; enum adcConversionStatus { ADC_CONVERSION_IS_NOT_FINISHED = 0U, ADC_CONVERSION_IS_FINISHED = 8U }; enum adc1HwTriggerSource { ADC1_EVENT = 0U, ADC1_HET1_8 = 1U, ADC1_HET1_10 = 2U, ADC1_RTI_COMP0 = 3U, ADC1_HET1_12 = 4U, ADC1_HET1_14 = 5U, ADC1_GIOB0 = 6U, ADC1_GIOB1 = 7U, ADC1_HET2_5 = 1U, ADC1_HET1_27 = 2U, ADC1_HET1_17 = 4U, ADC1_HET1_19 = 5U, ADC1_HET1_11 = 6U, ADC1_HET2_13 = 7U, ADC1_EPWM_B = 1U, ADC1_EPWM_A1 = 3U, ADC1_HET2_1 = 5U, ADC1_EPWM_A2 = 6U, ADC1_EPWM_AB = 7U }; enum adc2HwTriggerSource { ADC2_EVENT = 0U, ADC2_HET1_8 = 1U, ADC2_HET1_10 = 2U, ADC2_RTI_COMP0 = 3U, ADC2_HET1_12 = 4U, ADC2_HET1_14 = 5U, ADC2_GIOB0 = 6U, ADC2_GIOB1 = 7U, ADC2_HET2_5 = 1U, ADC2_HET1_27 = 2U, ADC2_HET1_17 = 4U, ADC2_HET1_19 = 5U, ADC2_HET1_11 = 6U, ADC2_HET2_13 = 7U, ADC2_EPWM_B = 1U, ADC2_EPWM_A1 = 3U, ADC2_HET2_1 = 5U, ADC2_EPWM_A2 = 6U, ADC2_EPWM_AB = 7U }; typedef struct adcData { uint32 id; uint16 value; } adcData_t; typedef struct adc_config_reg { uint32 CONFIG_OPMODECR; uint32 CONFIG_CLOCKCR; uint32 CONFIG_GxMODECR[3U]; uint32 CONFIG_G0SRC; uint32 CONFIG_G1SRC; uint32 CONFIG_G2SRC; uint32 CONFIG_BNDCR; uint32 CONFIG_BNDEND; uint32 CONFIG_G0SAMP; uint32 CONFIG_G1SAMP; uint32 CONFIG_G2SAMP; uint32 CONFIG_G0SAMPDISEN; uint32 CONFIG_G1SAMPDISEN; uint32 CONFIG_G2SAMPDISEN; uint32 CONFIG_PARCR; }adc_config_reg_t; void adcInit(void); void adcStartConversion(adcBASE_t *adc, uint32 group); void adcStopConversion(adcBASE_t *adc, uint32 group); void adcResetFiFo(adcBASE_t *adc, uint32 group); uint32 adcGetData(adcBASE_t *adc, uint32 group, adcData_t *data); uint32 adcIsFifoFull(adcBASE_t *adc, uint32 group); uint32 adcIsConversionComplete(adcBASE_t *adc, uint32 group); void adcEnableNotification(adcBASE_t *adc, uint32 group); void adcDisableNotification(adcBASE_t *adc, uint32 group); void adcCalibration(adcBASE_t *adc); uint32 adcMidPointCalibration(adcBASE_t *adc); void adcSetEVTPin(adcBASE_t *adc, uint32 value); uint32 adcGetEVTPin(adcBASE_t *adc); void adc1GetConfigValue(adc_config_reg_t *config_reg, config_value_type_t type); void adc2GetConfigValue(adc_config_reg_t *config_reg, config_value_type_t type); void adcNotification(adcBASE_t *adc, uint32 group); #pragma CHECK_MISRA("all,-19.1,-11.3,-8.7,-5.7,-5.6") void wait (uint32 ticks); void Copybytes ( const uint8 * src, uint8 * dst, uint8 len ); void makeBcopy( const uint16 noBytes, const uint8 *const src, uint8 *const dest ); void Copywords ( const uint16* src, uint16* dst, uint8 len ); void InitWords ( uint16* dst, uint16 val, uint16 len ); void InitBytes ( uint8 * dst, uint8 val, uint16 len ); uint8 CompareerrorB ( const uint8* src, const uint8* dst, uint8 len ); uint8 CompareerrorW ( const uint16* src, const uint16* dst, uint8 len ); uint16 rolb2bf(uint16 wo); uint16 rorb2bf( uint16 w); uint16 sqrt_32_16_n (uint32 r); void get_dec_str (signed char str[], uint8 len, uint32 val); void SetStop(void); void AckStop(void); void SetRun(void); void AckRun(void); #pragma CHECK_MISRA("-18.4,-5.7") typedef struct { uint8 b4,b3,b2,b1; } V4BYTES; typedef struct { uint16 high; uint16 low; } ulowhigh; typedef struct { sint16 high; sint16 low; } slowhigh; typedef struct { void* p1; void* p0; } zweiPointerInEinemULong; typedef union { V4BYTES v4b; ulowhigh uw; slowhigh sw; uint32 ul; sint32 sl; zweiPointerInEinemULong zp; } helpunion; typedef struct { uint16 high; uint16 low; } ulow_high; typedef union { ulow_high w; uint32 l; } timeunion; typedef struct { uint8 ucJahr; uint8 ucMonat; uint8 ucTag; uint8 ucStunde; uint8 ucMinute; uint8 ucSekunde; }timestruct; #pragma CHECK_MISRA("all,-19.1") typedef struct _11LP10{ volatile uint8 ucLP10Mode; volatile uint8 ucLP10Test; volatile uint8 ucLP10Out; volatile uint8 ucLP10OutInv; volatile uint8 ucLP10FeedBack; volatile uint8 ucLP10TestResult; volatile uint8 ucLP10Failure; volatile uint8 ucLP10ModeInv; volatile uint8 ucLP10TestInv; volatile uint8 ucLP10FeedBackInv; volatile uint8 ucLP10TestResultInv; volatile uint8 ucLP10FailureInv; volatile uint8 ucLP10Short; volatile uint8 ucLP10Over; } LP10St; typedef struct _11UP20 { volatile uint8 ucUP20Mode; volatile uint8 ucUP20Test; volatile uint8 ucUP20InA; volatile uint8 ucUP20InB; volatile uint8 ucUP20ModeInv; volatile uint8 ucUP20TestInv; volatile uint8 ucUP20InAInv; volatile uint8 ucUP20InBInv; } UP20St; #pragma CHECK_MISRA("-19.4, -19.7, -19.10") #pragma CHECK_MISRA("all,-19.1") #pragma CHECK_MISRA("-18.4,-5.6,-5.7") typedef union wordbyte{ uint32 ul[((uint8) 8u)]; sint32 sl[((uint8) 8u)]; sint16 ss[((uint8) 16u)]; uint16 word[((uint8) 16u)]; uint16* wordp[((uint8) 16u)]; uint32* longp[((uint8) 16u)]; uint8 byte[((uint8) 32u)]; sint8 sc[((uint8) 32u)]; } typ_wordbyte; typedef union mvbdata{ struct{ uint16 sid; uint16 stshigh; typ_wordbyte data; } imexdata; uint16 dummyword[18]; uint32 dummylong[ 9]; uint8 dummybyte[36]; void *dummyptr[18]; } typ_tmpdata; typedef struct { uint16 statusData; typ_wordbyte data; } data4vbox; typedef struct { uint16 portAdr; uint16 portIndex; uint8 portSizeW; uint8 portType; uint16 *portPCS; uint16 *portdata0; uint16 *portdata1; uint16 portSTT; uint16 portbuszyklus; uint8 ucIndex; uint8 ucProdukt; } portStructTS; typedef struct st_STS { timeunion lastportSTS[(((uint8) 10u))]; timeunion lastportCRCerrortime[(((uint8) 10u))]; uint8 portAktivcount[(((uint8) 10u))]; } stSTS; typedef struct st_StsPointer { stSTS *pPZB; stSTS *pLZB; stSTS *pATP; } StsPointer; typedef union p_StsUnion { StsPointer unP; stSTS *vP[3]; } pStsUnion; #pragma CHECK_MISRA ("all,-19.1") typedef struct { sint16 cors[((uint8) 14u)]; sint32 sumall; sint16 sum; sint16 min; sint16 max; uint8 index; uint8 reserved; } DriftStatistikRingpuffer; typedef struct STR_LP_PRT_CFG { uint16 prt_addr; uint16 prt_indx; uint16 size; uint16 type; } TYPE_LP_PRT_CFG; typedef struct STR_LP_TS_CFG { uint32 pb_pit; uint32 pb_pcs; uint32 pb_prt; uint32 pb_frc; uint32 pb_def; uint8 ownership; uint8 ts_type; uint16 dev_addr; uint32 tm_start; uint16 mcm; uint16 msq_offset; uint16 mft_offset; uint16 line_cfg; uint16 reply_to; uint16 prt_addr_max; uint16 prt_indx_max; uint16 prt_count; void *p_prt_cfg; } TYPE_LP_TS_CFG; uint8 MVBCInit ( const TYPE_LP_TS_CFG *Configuration, uint8 ts_id, boolean bRotate ); uint8 MVBCStart( uint8 ts_id, boolean bRotate ); uint8 MVBCInitDSW( uint8 sdd_ini, uint16 *device_adress, uint8 ts_id ); uint8 MVBCPutDSW( uint8 sdd_cyc, uint8 ssd_cyc, uint8 ts_id ); #pragma CHECK_MISRA("-19.7") #pragma CHECK_MISRA("all,-19.1") typedef struct strConfGlobal{ uint8 ID[15]; uint8 ucVersion; uint8 ucPrompt1[6]; uint8 ucPrompt2[6]; uint8 ucProductType; uint8 ucProductSubType; uint8 ucGNTFunctionality; uint8 ucFallBackType; uint8 ucArchitecture; uint8 ucDMIType; uint8 ucIDUServiceIF; uint8 ucVMaxVehicle; uint8 ucMVBConnection; uint8 ucPBConnection; uint16 usVStandStill; uint8 TigrisProductID[24]; uint8 TaskTime; } StructGlobal; #pragma CHECK_MISRA("-5.6,-5.7") typedef struct strConfPBGenerell{ uint8 HWVersion[8]; uint8 VendorId[8]; } ConfPBGenerell; typedef struct strConfPBTimingMC{ sint32 RecDynTransTime; sint32 RecStatTransTime; sint32 DynBusTransTime; sint32 StatBusTransTime; } ConfPBTimingMC; typedef struct strConfPBTimingP2P{ sint32 SendDynTransTime; sint32 SendStatTransTime; sint32 DynBusTransTime; sint32 StatBusTransTime; } ConfPBTimingP2P; typedef struct strConfPBTimingClock{ uint32 LCI; uint32 LocClockMaxResync; sint32 MyClockInacAfterAdjust; uint32 TimeLongTermDriftCheck; uint16 MinNoSynAndRefMsg; } ConfPBTimingClock; typedef struct strConfPB { ConfPBGenerell PBGenerell; ConfPBTimingMC PBTimingMC; ConfPBTimingP2P PBTimingP2P; ConfPBTimingClock PBTimingClock; } StructPB; typedef struct strConfTrainDataPLZB{ uint8 ucBRH; uint8 ucBRA; uint8 ucVMZ; uint8 ucZL; uint8 ucZugart; }ConfTrainDataPLZB; typedef struct strConfTrainData{ ConfTrainDataPLZB PLZB_GD; ConfTrainDataPLZB PLZB_ED1; ConfTrainDataPLZB PLZB_ED2; }structTrainData; typedef struct strMVBPPorts{ uint8 ucNrIFsCPUOne; uint8 ucNrIFsCPUTwo; }StructMVBPortsCommon; typedef struct strPBInterface{ uint8 ucNrIFsCPUOne; uint8 ucNrIFsCPUTwo; }StructPBInterface; typedef struct strMVBInterface{ uint8 ucConnection; uint8 ucFunctionality; uint8 ucNumberPorts; uint8 ucNumberReceivePorts; uint8 ucNumberVitalSendPorts; boolean bDSWSupport; boolean bRuecklesen; boolean bNRVVergleich; boolean bRotate; boolean bCPU2Send; portStructTS const *pStructTS; TYPE_LP_TS_CFG const *pTsCfg; }StructMVBInterface; #pragma CHECK_MISRA("all,-19.1") typedef struct strMVBIF { StructMVBInterface CPUOneIfOne; StructMVBInterface CPUOneIfTwo; StructMVBInterface CPUTwoIfOne; StructMVBInterface CPUTwoIfTwo; StructMVBInterface CPUOneIfFB; }StructMVBIFDetails; typedef struct strVoltSup { uint8 active; uint8 bitmaskAdjTest; uint32 adrAdjTest; uint16 minVoltAdj; uint16 maxVoltAdj; uint32 errorCodeAdj; uint16 minVoltOp; uint16 maxVoltOp; uint32 errorCodeOp; } VoltageSupervision; typedef struct _pStruct{ uint32 ulAnzahl; void *pGlobal; void *pPBCom; void *pPB; void *pTD; void *pMVBCom; void *pMVBDet; void *pCPU1Port1; void *pCPU1Ts1; void *pCPU1CpTs1; void *pCPU1Port2; void *pCPU1Ts2; void *pCPU1CpTs2; void *pCPU1PortFB; void *pCPU1TsFB; void *pCPU1CpTsFB; void *pCPU2Port1; void *pCPU2Ts1; void *pCPU2CpTs1; void *pCPU2Port2; void *pCPU2Ts2; void *pCPU2CpTs2; void *pVoltSup; } pStruct; extern VoltageSupervision const *pVSup; adcData_t adc1_data[7]; adcData_t adc2_data[3]; uint16 adc1_values[7]; uint16 adc2_values[3]; uint16 adc_values[((uint8) 10U)]; uint16 adcValuesIterations[((uint8) 3U)][((uint8) 10U)]; uint16 adc_values_cycle[((uint8) 10U)]; static uint16 uErrorVolt; void OpenSwitch(void); void CloseSwitch(void); void IniSpgTest(void); uint32 OnInitStartVoltSup(void); void ReadADC_Values(void); uint32 OnInitTestChannelVolt(uint8 num,uint16 min, uint16 max, char mode); void copyADCvalues(uint16 D2Array[][((uint8) 10U)],uint8 index); void calcAvgValues(uint16 D2Array[][((uint8) 10U)],uint16 D1Array[]); void resetArray(uint16 array[],uint8 size); uint32 OnCycleMonitorVoltage(void); uint32 OnCycleTestChannelVolt(uint8 num, uint16 min, uint16 max); void OnCycleCopyADCvalues(void); uint32 OnInitStartVoltSup(void){ uErrorVolt =0U; uint8 k=0U; CloseSwitch(); for(k=0U;k<((uint8) 3U);k++) { ReadADC_Values(); copyADCvalues(adcValuesIterations,k); wait(((uint32) 100000u)); } calcAvgValues(adcValuesIterations,adc_values); uint8 i=0U; for(i=0U;i<((uint8) 10U);i++) { if(pVSup[i].active) { uErrorVolt=OnInitTestChannelVolt(i,pVSup[i].minVoltAdj,pVSup[i].maxVoltAdj,'a'); if(uErrorVolt!=0U) return uErrorVolt; } } resetArray(adc_values,((uint8) 10U)); OpenSwitch(); for(k=0U;k<((uint8) 3U);k++) { ReadADC_Values(); copyADCvalues(adcValuesIterations,k); wait(((uint32) 100000u)); } calcAvgValues(adcValuesIterations,adc_values); for(i=0U;i<((uint8) 10U);i++) { if(pVSup[i].active) { uErrorVolt=OnInitTestChannelVolt(i,pVSup[i].minVoltOp,pVSup[i].maxVoltOp,'b'); if(uErrorVolt!=0U) return uErrorVolt; } } return uErrorVolt; } void OpenSwitch(void) { gioSetBit(((gioPORT_t *)0xFFF7FC18U), 2U, 0U); gioSetBit(((gioPORT_t *)0xFFF7F418U), 0U, 0U); gioSetBit(((gioPORT_t *)0xFFF7FC18U),17U,0U); gioSetBit(((gioPORT_t *)0xFFF7FC18U),25U,0U); gioSetBit(((gioPORT_t *)0xFFF7FC18U),26U,0U); } void CloseSwitch(void) { gioSetBit(((gioPORT_t *)0xFFF7FC18U), 2U, 1U); gioSetBit(((gioPORT_t *)0xFFF7F418U), 0U, 1U); gioSetBit(((gioPORT_t *)0xFFF7FC18U),17U,1U); gioSetBit(((gioPORT_t *)0xFFF7FC18U),25U,1U); gioSetBit(((gioPORT_t *)0xFFF7FC18U),26U,1U); } void ReadADC_Values(void) { uint8 i; adcStartConversion(((adcBASE_t *)0xFFF7C000U),1U); while(!adcIsConversionComplete(((adcBASE_t *)0xFFF7C000U),1U)); for(i=0U;i<7U;i++) { adcGetData(((adcBASE_t *)0xFFF7C000U),1U,&adc1_data[i]); } for(i=0U;i<7U;i++) { adc1_values[i]=adc1_data[i].value; } adcStartConversion(((adcBASE_t *)0xFFF7C200U),1U); while(!adcIsConversionComplete(((adcBASE_t *)0xFFF7C200U),1U)); for(i=0U;i<3U;i++) { adcGetData(((adcBASE_t *)0xFFF7C200U),1U,&adc2_data[i]); } for(i=0U;i<3U;i++) { adc2_values[i]=adc2_data[i].value; } adcStopConversion(((adcBASE_t *)0xFFF7C000U),1U); adcStopConversion(((adcBASE_t *)0xFFF7C200U),1U); } uint32 OnInitTestChannelVolt(uint8 num,uint16 min, uint16 max, char mode) { uint32 retValue=0U; if(mode=='a') { if(!((minerrorCodeOp; } return retValue; } void OnCycleCopyADCvalues(void) { adc_values_cycle[0] = adc1_values[0]; adc_values_cycle[1] = adc1_values[1]; adc_values_cycle[2] = adc1_values[2]; adc_values_cycle[3] = adc1_values[3]; adc_values_cycle[4] = adc1_values[4]; adc_values_cycle[5] = adc1_values[5]; adc_values_cycle[6] = adc1_values[6]; adc_values_cycle[7] = adc2_values[0]; adc_values_cycle[8] = adc2_values[1]; adc_values_cycle[9] = adc2_values[2]; } uint32 OnCycleMonitorVoltage(void) { uint32 errorCode=0U; ReadADC_Values(); OnCycleCopyADCvalues(); uint8 i; for(i=0U;i<((uint8) 10U);i++) { if(pVSup[i].active) { errorCode=OnCycleTestChannelVolt(i, pVSup[i].minVoltOp, pVSup[i].maxVoltOp); if(errorCode !=0U) return errorCode; } } return errorCode; }