static void sdhci_set_power(struct sdhci_host *host, unsigned char mode, 1224 unsigned short vdd) 1225 { 1226 u8 pwr = 0; 1227 1228 if (mode != MMC_POWER_OFF) { 1229 switch (1 << vdd) { 1230 case MMC_VDD_165_195: 1231 pwr = SDHCI_POWER_180; 1232 break; 1233 case MMC_VDD_29_30: 1234 case MMC_VDD_30_31: 1235 pwr = SDHCI_POWER_300; 1236 break; 1237 case MMC_VDD_32_33: 1238 case MMC_VDD_33_34: 1239 pwr = SDHCI_POWER_330; 1240 break; 1241 default: 1242 BUG(); 1243 } 1244 } 1245 1246 if (host->pwr == pwr) 1247 return; 1248 1249 host->pwr = pwr; 1250 1251 if (pwr == 0) { 1252 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); 1253 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) 1254 sdhci_runtime_pm_bus_off(host); 1255 vdd = 0; 1256 } else { 1257 /* 1258 * Spec says that we should clear the power reg before setting 1259 * a new value. Some controllers don't seem to like this though. 1260 */ 1261 if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) 1262 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); 1263 1264 /* 1265 * At least the Marvell CaFe chip gets confused if we set the 1266 * voltage and set turn on power at the same time, so set the 1267 * voltage first. 1268 */ 1269 if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) 1270 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 1271 1272 pwr |= SDHCI_POWER_ON; 1273 1274 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 1275 1276 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) 1277 sdhci_runtime_pm_bus_on(host); 1278 1279 /* 1280 * Some controllers need an extra 10ms delay of 10ms before 1281 * they can apply clock after applying power 1282 */ 1283 if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) 1284 mdelay(10); 1285 } 1286 1287 if (host->vmmc) { 1288 spin_unlock_irq(&host->lock); 1289 mmc_regulator_set_ocr(host->mmc, host->vmmc, vdd); 1290 spin_lock_irq(&host->lock); 1291 } 1292 } 1293