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TPS40210: COMP Pin Voltage, Slope and Valley Voltage, and Current Limiting

Part Number: TPS40210
Other Parts Discussed in Thread: LM5155, UC3842

I have a series of questions regarding the behavior of this chip, in reference to the block diagram (datasheet, section 7.2) and its actual in-circuit behavior.

Where I have provided a [partial] answer, please give confirmation that it is the correct and complete answer, or else provide such..

1. What is the voltage and current range of the COMP pin?

A: I have discovered a partial answer here on the forum.  Apparently it is 1.2 to 2.1V: https://e2e.ti.com/support/power-management/f/196/p/685383/2525312#2525312  (Why is this data not in the datasheet?)

However I have measured up to 2.3V in a real circuit.  Please confirm.

2. What is the amplitude, gain and offset of the summer block (which combines the oscillator ramp with the (Gain = 6) * ISNS signal)?

A: Is this the meaning of "valley voltage"?  This post asks the same question: https://e2e.ti.com/support/power-management/f/196/t/627267 

  • Hi Tim,

    Thank you for your interests. To answer your questions:
    1. The COMP pin currents (sinking and sourcing) are given in the EC table. The min matters because it determines the min swing speed of the COMP voltage, but the max is not the concern, so not listed. Regarding the COMP voltage, it is basically an intermediate signal not intended to be used by external circuit, so it is not given. What matters is the Error Amp Gain itself. The typical COMP voltage range is 1.2 to 2.1V, but it may change slightly from part to part owing to process tolerances.

    2. These are internal signals, and the info does not affect how you use the part because the necessary info is offered. Actually I myself do not know such detailed info. The device was developed 10 years ago and we will have to dig into the design file to find out.

    Thanks,
    Youhao
  • What the hell, there's a whole half of my question missing. It got cut off somehow (or edited). I will try to remember.

    3. What is the nature of the "logic" block (which is a misnomer, as two analog signals enter it)? In particular, are the two analog signals simply compared to each other with no offset?

    The thrust of these being, COMP is an external pin, and knowing its range, and the range of the internal signals, we can work backwards to determine the range of ISNS when the error amplifier is requesting maximum current (positive saturated output).

    4. The problem I seem to be having, which brings me here: can the TPS40210 operate in current limiting (NOT current faulting) mode at all?

    My measurements suggest the answers to 2 and 3 are such that, when the error amp is saturated, the controller will fault itself. Is there a workaround for this?

    Thanks,
    Tim
  • Hi Tim,

    Let me help you to get rid of all these troubles in a different way: we just released a new boost controller the LM5155, which is a better device that improves the current limit issues that you are facing. The LM5155 is a device incorporated many improvements from TI's older boost controllers. Please try it.

    Thanks,
    Youhao
  • Unfortunately this is in regards to a project which is moving into production in a couple of months, and LM5155 is not currently available from any distributors.

    I really should've just gone with the old standby UC3842. Or, do you have a version of the UC3842 with the low-current and high-voltage features of the TPS40210 or LM5155, and comparable cost?