Alex Dyer's Activities

MSP430 interrupts

Alex Dyer — Thu, 30 Jun 2016 13:30:35 GMT

I've got a situation where the MSP430 is observing multiple high to low interrupts on both port 1 and port 2, with the first pin to interrupt is P2.7 and depending on the scenario all port 1 and port 2 pins may be triggered.

The important part of the signal has a period of 50us, the system must then be ready to receive another signal 200us later.

Currently I have interrupts enabled on all pins, setting variables to inform the system that the interrupt has occurs and storing the value of P1IV and P2IV.

After the first interrupt the main loop enters a function where it is held for 100us while the interrupts are repeatedly serviced, the values of the copied P1IV and P2IV variables are then compared at the end of this hold period and the result stored.

The issue I'm having is that despite the observe, wait and monitor, record process which takes less than 200us (on the MSP430 at 24 MHz) the system is unable to respond to events at a rate of 50 Hz, which is order of magnitudes slower than it should be capable of. Only 70% of the events are recorded.

Could it be a case of too many interrupts being called? Though I find this hard to believe when running at 24 MHz.

MSP430 not initialising microSD

Alex Dyer — Wed, 11 May 2016 12:58:27 GMT

Other Parts Discussed in Thread: MSP-EXP430F5529LP

HI,

I've taken the example code slaa281b and I'm not getting a response from two microSD cards (I've tried with the MSP-EXP430F5529LP

I've connected the microSD as follows

microSD MSP430

Pin1(NC) N/A

Pin2(CS) <----------------------- P3.4(GPIO)

Pin3(DI) <----------------------- P3.0(SIMO)

Pin4(Vdd) <---------------------- 3V3

Pin5(CLK) <---------------------- P3.2(SCLK)

Pin6(Vss) <---------------------- GND

Pin7(DO) ----------------------> P3.1(SOMI)

Pin8(NC) N/A

A 47K resistor is on the CS line to 3V3, a 100nF cap is between 3V3 and GND and the code has been tried with and without a 10K resistor tried high on DO.

I have a scope on all four pins (also tested on pads of microSD card), the CLK is at 200kHz and the other pins are responding as in the code and yet no output is seen on DO.

-With the DO tied high, it remains high throughout the initialisation and GO_IDLE_STATE command

-With the pull up removed DO remains low throughout the initialisation and GO_IDLE_STATE command

Here is my complete code

#include <msp430.h>
#include <stdio.h>

#define TRUE 1
#define FALSE 0

unsigned int clkFail = 0;
unsigned int XT2Fail = 0;

#define SD_CS BIT4
#define SD_DETECT BIT5
#define SD_SIMO BIT0
#define SD_SOMI BIT1
#define SD_CLK BIT2

#define CS_LOW()    P3OUT &= ~SD_CS               												// Card Select
#define CS_HIGH()   while (!(UCB0IFG&UCTXIFG)); P3OUT |= SD_CS  								// Card Deselect

unsigned char microSD;
unsigned char  mircoSDError;

#define SD_SUCCESS 0x00
#define SD_BLOCK_SET_ERROR 0x01
#define SD_RESPONSE_ERROR 0x02
#define SD_DATA_TOKEN_ERROR 0x03
#define SD_INIT_ERROR 0x04
#define SD_CRC_ERROR 0x10
#define SD_WRITE_ERROR 0x11
#define SD_OTHER_ERROR 0x12
#define SD_TIMEOUT_ERROR 0xFF

#define DUMMY_CHAR 0xFF

#define SD_GO_IDLE_STATE 0x40 //CMD0
#define SD_SEND_OP_COND	0x41 //CMD1

#define CMD0_CRC 0x95

static void _UCSinitDev(void);
void SetVcoreUp (unsigned int level);

void _SDinit (void);
char SDidle (void);
void SDSendCmd (const char cmd, unsigned long data, const char crc);
char SDGetResponse(void);
unsigned char SDSendFrame(unsigned char* pBuffer, unsigned int size);
char SDPing(void);

int main(void)
	{
		WDTCTL = WDTPW+WDTHOLD;                 												// Stop watchdog timer

		_UCSinitDev();																				// Setup UCS

		__enable_interrupt();

		_SDinit ();
	}

/*************/
/* UCS setup */
/*************/

static void _UCSinitDev(void)
	{
		static unsigned int clkRetries,XT2Retries = 0;
		static const unsigned int CLK_RETRIES_MAX = 0xFFFF;

		P5SEL |= (BIT2 | BIT3); 																// Set P5.2/3 to XT2
		P1SEL |= BIT0;
		P1DIR |= BIT0;

		SetVcoreUp (0x01);
		SetVcoreUp (0x02);
		SetVcoreUp (0x03);

		UCSCTL6 |=(XT1OFF); 																	// Turn Off XT1
		UCSCTL6 &=~(XT2OFF); 																	// Enable XT2
		UCSCTL6 |= (XT2DRIVE_3);

		// Loop until XT1 fault flag is cleared
		do
			{
				  UCSCTL7 &= ~XT2OFFG;                  										// Clear XT1 fault flags
				  XT2Retries++;
			}
		while ((UCSCTL7&XT2OFFG) && (XT2Retries < CLK_RETRIES_MAX));               				// Test XT1 fault flag

		if(XT2Retries == 0xFFFE)
			{
				XT2Fail = 1;
			}

		//XT2 now stable, reduce drive strength
		UCSCTL6 |= (XT2DRIVE_2);

		UCSCTL3 = (SELREF__XT2CLK | FLLREFDIV__16); 											// DCO_Ref = XT2/16
																								// -> 4MHz/16 = 0.25 MHz
		__bis_SR_register(SCG0);                  												// Disable the FLL control loop
		UCSCTL1 = (DCORSEL_5);																	// Set DCORSEL to 5
		UCSCTL2 = (0x001F | FLLD__16); 															// DCOCLK = DCO_Ref x (31+1) x FLLD__#, DCOCLKDIV = DCOCLK / FLLD__#
																								// -> DCOCLK = 16 MHz, DCOCLKDIV = 1 MHz
		__bis_SR_register(SCG0);                  												// Enable the FLL control loop
		UCSCTL4 = (SELA__DCOCLKDIV | SELS__DCOCLK | SELM__DCOCLK); 								// ACLK = DCOCLK, SMCLK = MCLK = DCOCLK
		UCSCTL5 = (DIVPA__1 | DIVA__1 | DIVS__1 | DIVM__1); 									// Output pin clk = ACLK/16 = 1 MHz

		__delay_cycles(253952);

		do
			{
				UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
																								// Clear XT2,XT1,DCO fault flags
				SFRIFG1 &= ~OFIFG;                      										// Clear fault flags
				clkRetries++;
			}
		while ((SFRIFG1&OFIFG) && (clkRetries < CLK_RETRIES_MAX));                   			// Test oscillator fault flag

		if(clkRetries == 0xFFFE)
			{
				clkFail = 1;
			}
	}

void SetVcoreUp (unsigned int level)
	{
		// Open PMM registers for write
		PMMCTL0_H = PMMPW_H;
		// Set SVS/SVM high side new level
		SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level;
		// Set SVM low side to new level
		SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level;
		// Wait till SVM is settled
		while ((PMMIFG & SVSMLDLYIFG) == 0);
		// Clear already set flags
		PMMIFG &= ~(SVMLVLRIFG + SVMLIFG);
		// Set VCore to new level
		PMMCTL0_L = PMMCOREV0 * level;
		// Wait till new level reached
		if ((PMMIFG & SVMLIFG))
			while ((PMMIFG & SVMLVLRIFG) == 0);
		// Set SVS/SVM low side to new level
		SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level;
		// Lock PMM registers for write access
		PMMCTL0_H = 0x00;
	}

/*************/
/*  microSD  */
/*************/

void _SDinit (void)
	{
		int i;
		unsigned char SDstatus = FALSE;
		int timeout;
		unsigned char response;

		if (!SDPing())      											// No microSD card
			{
				microSD = FALSE;
			}
		else														// microSD card is inserted
			{
				while (SDstatus != TRUE)                       			// SD not initialised
					{
						// Init Port for SD (default high)
						P3OUT |= SD_SIMO + SD_CLK;
						P3DIR |= SD_SIMO + SD_CLK;

						// Chip Select
						P3OUT |= SD_CS;
						P3DIR |= SD_CS;

						// Init SPI Module
//						UCB0CTL1 |= UCSWRST;                    												// **Put state machine in reset**
						UCB0CTL0 = UCMST+UCCKPL+UCMSB+UCSYNC;     												// 3-pin, 8-bit SPI master
						UCB0CTL1 = UCSSEL__ACLK + UCSWRST;                    												// **Put state machine in reset**
//						UCB0CTL1 |= UCSSEL__ACLK;              													// ACLK
						UCB0BR0 |= 0x05;                          												// SPICLK = 400kHz
						UCB0BR1 = 0;
//						P3SEL |= SD_SIMO + SD_SOMI + SD_CLK;                									// Enable SIMO, SOMI and SCLK pins
						UCB0CTL1 &= ~UCSWRST;                     												// **Initialize USCI state machine**

						// Initialization sequence on PowerUp
						CS_HIGH();

						for(i=0;i<=20;i++)
							{
								spiSendByte(DUMMY_CHAR);
							}

						SDstatus = SDidle();

						timeout++;
						if (timeout == 150)                      		// Try 150 times till error
							{
								microSD = FALSE;
								return;
							}
					}
			microSD = TRUE;
		}
	}

char SDidle (void)
	{
		char response=0x01;
		CS_LOW();

		//Send Command 0 to put MMC in SPI mode
		SDSendCmd(SD_GO_IDLE_STATE,0,CMD0_CRC);
		//Now wait for READY RESPONSE
		if(SDGetResponse()!=0x01)
			{
				mircoSDError = SD_INIT_ERROR;
				return (FALSE);
			}
		while(response==0x01)
			{
				CS_HIGH();
				spiSendByte(DUMMY_CHAR);						// Send single Byte on SPI
				CS_LOW();
				SDSendCmd(SD_SEND_OP_COND,0x00,0xFF);
				response = SDGetResponse();
			}

		CS_HIGH();
		spiSendByte(DUMMY_CHAR);
		return (TRUE);
	}

//Send one byte via SPI
unsigned char spiSendByte(const unsigned char data)
	{
		while (!(UCB0IFG&UCTXIFG));    // wait while not ready for TX
		UCB0TXBUF = data;            // write
		while (!(UCB0IFG&UCRXIFG));    // wait for RX buffer (full)
		return (UCB0RXBUF);
	}

void SDSendCmd (const char cmd, unsigned long data, const char crc)
	{
		unsigned char frame[6];
		char temp;
		int i;

		frame[0]=(cmd|0x40);
		for(i=3;i>=0;i--)
			{
				temp = (char)(data>>(8*i));
			  	frame[4-i] = (temp);
		  	}
		frame[5]=(crc);
		SDSendFrame(frame,6);
	}

char SDGetResponse(void)
	{
		//Response comes 1-8bytes after command
		//the first bit will be a 0
		//followed by an error code
		//data will be 0xff until response
		int i=0;

		char response;

		while(i<=64)
			{
				response = spiSendByte(DUMMY_CHAR);
				if(response==0x00)break;
				if(response==0x01)break;
				i++;
			}
		return response;
	}

unsigned char SDSendFrame(unsigned char* pBuffer, unsigned int size)
	{
		unsigned long i = 0;
		// clock the actual data transfer and receive the bytes; spi_read automatically finds the Data Block
		for (i = 0; i < size; i++)
			{
				while (!(UCB0IFG&UCTXIFG));         			// USCI_B0 TX buffer ready?
				UCB0TXBUF = (0xFF);							// LSB not transfer buffer
				while (!(UCB0IFG&UCRXIFG));    				// USCI_B0 RX buffer full?
				pBuffer[i] = UCB0RXBUF;
			}
		return(0);
	}

char SDPing(void)
	{
/*		// Card Detect
		P3DIR &=  ~SD_DETECT;

 		if (!(P3IN & SD_DETECT))								//SD_DETECT Pulled Low
			{
				return (TRUE);
			}
		else													//SD_DETECT Pulled High
			{
				return (FALSE);
			}
*/		return (TRUE);
	}

MSP430F5529 UCS Configuration

Alex Dyer — Thu, 10 Dec 2015 12:20:47 GMT

Initially I had issues with the MSP430 debugger not working which turned out to by the UCS causing a reset due to OFIFG and the debugger residing in 0x0004.

Since then I have used the examples provided in MSPware, these forums and made sure I have not misunderstood the information in the user guide.

This is using the 4 MHz crystal on the launchpad connected to XT2.

Here is my UCS code:

static void _UCSinit(void)
{
	static unsigned int clkRetries,XT2Retries = 0;
	static const unsigned int CLK_RETRIES_MAX = 0xFFFF;

    P5SEL |= (BIT2 | BIT3); 														// Set P5.2/3 to XT2
    P1SEL |= BIT0;
    P1DIR |= BIT0;

    UCSCTL6 |=(XT1OFF); 															//Turn Off XT1
    UCSCTL6 &=~(XT2OFF); 															//Enable XT2
    UCSCTL6 |= (XT2DRIVE_3);

    // Loop until XT1 fault flag is cleared
    do
		{
			  UCSCTL7 &= ~XT2OFFG;                  								// Clear XT1 fault flags
			  XT2Retries++;
		}
    while ((UCSCTL7&XT2OFFG) && (XT2Retries < CLK_RETRIES_MAX));               		// Test XT1 fault flag

    if(XT2Retries == 0xFFFE)
       	{
       		XT2Fail = 1;
       	}

    //XT2 now stable, reduce drive strength
    UCSCTL6 |= (XT2DRIVE_0);

    UCSCTL3 = (SELREF__XT2CLK | FLLREFDIV__8); 										// DCO Reference = XT2/8 													-> 0.5 MHz
    __bis_SR_register(SCG0);                  										// Disable the FLL control loop
//    UCSCTL0 = 0x0000;
    UCSCTL1 = (DCORSEL_5);															// Set DCORSEL to 5, for Freq range 23.7 -> 54.1 MHz
    UCSCTL2 = (0x1f | FLLD__2); 													// DCOCLK = Input x (31+1) x 2, DCOCLKDIV = DCOCLK / 2							-> DCOCLK = 32 MHz, DCOCLKDIV = 16 MHz
    __bis_SR_register(SCG0);                  										// Enable the FLL control loop
    UCSCTL4 = (SELA__DCOCLKDIV | SELS__DCOCLK | SELM__DCOCLK); 						// ACLK = DCO/2, SMCLK = MCLK = DCOCLK
    UCSCTL5 = (DIVPA__16 | DIVA__1 | DIVS__1 | DIVM__1); 							// Output pin clk = ACLK/16 = 1 MHz

    __delay_cycles(253952);

    do
		{
    		UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
                                                   									// Clear XT2,XT1,DCO fault flags
    		SFRIFG1 &= ~OFIFG;                      								// Clear fault flags
    		clkRetries++;
       }
    while ((SFRIFG1&OFIFG) && (clkRetries < CLK_RETRIES_MAX));                   	// Test oscillator fault flag

    if(clkRetries == 0xFFFE)
       	{
       		clkFail = 1;
       	}
}

From my understanding this should give me 1 MHz on pin 1.0, instead I get 0.5 MHz.

Editing FLLREFDIV, FLLN or FLLD__4 has no affect on the frequency at Pin 1.0 (tested with ACLK = DCOCLK and DCOCLKDIV).

Changing DCORSEL to 4 or 6 changes the frequency to two other values which are again unchangeable.

What am I doing wrong in the UCS setup?

Cheers.

MSP430F5529LP Launchpad examples not working

Alex Dyer — Thu, 29 Oct 2015 15:54:44 GMT

Other Parts Discussed in Thread: MSP-EXP430F5529LP

Hi, I've tried the examples SimpleUsbBackchannel and OutOfBox_EmulStorageKeyboard_16KB and neither of them work. I've installed the USB/COM driver and for the first example set up Putty to listen to COM6, for the latter I opened Notepad as suggested.

Looking at the code on the MSP430 the it is polling the USB as expected but no data is moving in either direction.

Any suggestions?

CCSv6.1 create_projectspec.exe broken

Alex Dyer — Mon, 05 Oct 2015 10:19:21 GMT

Other Parts Discussed in Thread: MSP430F5529

This is a clean install of CCSv6.1 on windows 7 x86, I'm trying to load one of the examples provided and I get the error "CreateProcess error=267, The directory name is invalid"

In the image below you can see this, I've also browsed to the directory involved and you can clearly see the address is correct and the file is present.

I'd like to have a working example of code on the MSP430F5529 so that I can focus on the specifics of my project.

STC - Configuration and Storage

Alex Dyer — Sun, 19 Aug 2012 23:02:35 GMT

Other Parts Discussed in Thread: HALCOGEN

Hi Everyone,

At each boot up I will be running a STC/LBIST, I will be using the file below where the code will be called before main(); in sys_startup.c

I found the file on this forum and now that I understand how it works I will be editing it for my needs.

e2e.ti.com/.../5023.STC.asm

However I have a few questions on how to go about it.

1 - I would like to store the status of the STC registers before a reset eg STCCICR (interval no. of failure), STCGSTAT, STCFSTAT (what type of failure?) .

2 - I would also like to store the Golden MISR as well as the MISR when a failure occurs, I can see the last MISR can be found through STC_CADDR but I cant see how to get to the golden MISR.

As any mapping to the ESM is lost after a reset, I need some way of storing all this info and setting a flag to inform the TMS570 it needs to send this data to my system via SPI.

According to http://e2e.ti.com/support/microcontrollers/hercules/f/312/t/122665.aspx it looks like the RAM at >0x08000000 is the best place as long as it is dealt with asap.

Cheers,

Alex

Two way SPI communication, Master missing first byte from slave.

Alex Dyer — Sun, 15 Jul 2012 20:33:20 GMT

Hi everyone!

This issue could been seen as a continuation of a previous thread I started here a month ago however I feel a new thread should be started as the issue remains after going through my code to make sure I have not inadvertently changed or left out any of the code recommended in said thread. If a moderator feels disagrees please append this to my previous thread.

The Background:

I've been working on getting a PIC18 (set as master) to communicate with a TMS570 (slave). The aim of the exercise is to have the PIC18 periodically request data from the TMS570, where all data packets will be 4 bytes long.

In order to do this an interrupt routine has been set up on the TMS570 where when the PIC18 pulls RB1 high the TMS570 gets ready to receive a 4 byte telecommand, the TMS570 then informs the PIC18 it is ready to receive by pulling another RB2 high.

As all telecommands will result in a response from the TMS570 the PIC18 has been coded to wait until RB2 is pulled high a second time to indicate that the TMS570 is now ready to send data back.

In the case I have provided below it is a simple routine to inform the PIC18 that the TMS570 is operational (it will be expanded further to include error codes once this issue is resolved)

The problem:

So to recap the TMS570 receives all bytes sent by the PIC18, both the Telecommand and the junk bytes sent to stimulate the SPI for the return data, however the PIC18 seems to miss the first byte of each packet sent by the TMS570. The data return routine is based on the fact that the TMS570 can not send data until the SPI clock is started again and the first byte from PIC18 is sent. With this in mind the TMS570 places the data into its SPI buffer, then "starts" its transfer (however as the Master has not started the transfer TMS570 will wait) pulls the GIO high and then polls the transfer complete flag. As for the PIC18 while the TMS570 is preparing its response the PIC18 makes its way to the SPI receive function I've set up, waits until RB2 is pulled high and then starts the SPI transfer immediately.

Can you see any errors I have made in my code/logic which would result in the PIC18 missing the first byte sent by the TMS570?

e2e.ti.com/.../4214.Main.c

e2e.ti.com/.../7180.EB_2D00_SPI_2D00_COMMS.zip

Thanks in advance

Alex

State of nERROR pin during start-up and reset

Alex Dyer — Mon, 09 Jul 2012 00:43:28 GMT

I've looked through the TMR and data sheet but i can not see any information on the state of the nEEROR pin durring start-up and after a reset has been initiated by pulling RST low.

Is the nERROR pin designed to behave in a certain way during start-up alternatively are there other pins that indicate when the TMS570 has finished starting-up or is it advisable to just use a GPIO to do this.

Thanks in advance,

Alex

Using EMIF for data recording

Alex Dyer — Mon, 09 Jul 2012 00:06:28 GMT

Other Parts Discussed in Thread: TMS570LS20216, HALCOGEN

Hi Everyone,

I've connected a 64Mbit NOR flash to the EMIF (using CS0), this device needs to be programmed before any data can be written to its addresses, looking at the data sheet and TMR the EMIF should be able to handle this via the use of specially written functions.

However I need to be sure the TMS570 will not try and access this address range in any of its background routines (or as a result of array generation from my code) as data can not be stored at these addresses with out preparing the NOR flash.

Can you confirm that the TMS570 will not try and do this or alternatively indicate how the TMS570 can be set up to have this address range protected or access restricted?

Thanks in advance

Alex

Connecting XDS100v2 JTAG to TMS570LS20216SZWT

Alex Dyer — Sun, 10 Jun 2012 19:44:43 GMT

Hi,

I'm using the XDS100v2 with the 14-pin connector, I've read through the all the documentation I can find and CSS is able to connect to the TMS570, program it and start the code I've loaded on to it.

However CCS is unable to pause/halt the code in debug mode, it seems to lose all communication with it.

I currently have the XDS100v2 hooked up as per the table in your wiki page, however I have the Key, EMU0 and EMU1 pins on the XDS100v2 unconnected, could one of these pins being unconnected be the reason it is unable to halt/pause the TMS570?

The exact error message is:

CortexR4: Error connecting to the target: (Error -2062 @ 0x0) Unable to halt device. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Release 5.0.429.0)

I curently have the JTAG running at 1MHz so I don't think this is the problem.

Problems with SPI between TMS570 and PIC18

Alex Dyer — Wed, 06 Jun 2012 16:27:01 GMT

Other Parts Discussed in Thread: TMS570LS20216, HALCOGEN

After many weeks of trying I've been unable to decipher how the SPI on the TMS570LS20216 works. I currently have the USB dev board attached via 3 pin SPI to a PIC dev board, the PIC as master and the TMS570 set as slave.

In the end I need the TMS570 to run independently and respond to ad-hoc requests from the PIC for data from different TMS570 peripherals.

However I currently can not get the two to consistently talk to each other. I have the TMS570 set to 8 bit transmission word, with clock polarity set to high (the two refuse to work entirely when set to low), trigger events are disabled, one shot and CS is not used.

To replicated the intended role of the TMS570, after starting the debugger I have the TMS570 start up the GIO, SPI and global interrupts and then wait in an infinite loop.

At the same time the PIC is started with its own debugger; sets up all the relevant peripherals, loads an array with a 2 byte command, causes an interrupt on the TMS570 (via GIOA0) and finally sends the 2 byte command using a loop and the transfer complete flag.

On the oscilloscope I can see the PIC sending the CLK signal and the 2 byte command but nothing is being returned from the TMS570. I have also used delays on the PIC to ensure the TMS570 is ready to receive/send but with no luck.

In the TRM a comparability mode is mentioned, I've seen it talked about in the forums too, how is this set up in HALCoGen?

What is the meaning of Length in the Transfer Groups, at 0, does this mean the spiIsTransferComplete function will return a 1 as soon as the first transmission word is received, while a 1 will mean after 2 transmission words have been received etc.

As for the read function setup by HALCoGen, I assume it does not need to have the SPI module exercised, it merely copies the data currently in the RX/SPI buffers to the desired array.

Older devices required the SPI buffers to be cleared before any data is sent/read, is this taken care of with the spiSetData, spiTransfer and spiGetData functions provided by HALCoGen?

As a side note, if the help in either HALCoGen or CCS contained any information, it would have been very helpful.