https://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1672242/dlplcr4500evm-the-image-projected-by-the-dlp4500-has-a-lot-of-white-spots/6520824Mon, 26 Oct 2026 09:20:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:75c971ee-7a19-411b-b7b3-403a37bfe557yanjie LiHello Aaron, I hope you’re doing well. I’m following up again on my DLPLCR4500EVM replacement. I have not yet received the replacement unit or any shipping confirmation or tracking information. Could you please help check the current status and advise on the expected shipping date? If it has already shipped, I would appreciate it if you could share the tracking details. As this matter has been pending for quite some time, I would be grateful for your help moving it forward. Order number: T06633922 Support case: CS3558221 Thank you for your continued assistance. Best regards, Yanjie Lihttps://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1692442/lm2576hv-suitability-cross-check/6520823Mon, 26 Oct 2026 09:20:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5046bdf6-5ef3-429a-83ce-9c66677859f7Niranjan NairHi, What are the input voltage and load requirements for each rail?https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1691326/lm5148-variation-in-power-conversion-efficiency-at-light-loads/6520821Mon, 26 Oct 2026 09:18:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:286dde32-0dec-4d86-b99a-eb8e692fbbf7user5054474Hi, I have attached the schematic . e2e.ti.com/.../8461.schematic.pdf Best Regards,https://e2e.ti.com/support/tools/code-composer-studio-group/ccs/f/code-composer-studio-forum/1690660/tm4c1294ncpdt-tm4c1294ncpdt-custom-pcb-cannot-be-programmed-via-ek-tm4c1294xl-icdi-jtag-communication-and-power-supply-verification/6520822Mon, 26 Oct 2026 09:18:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:2e2e9eca-23c3-429c-9f9d-44b39564397bXiaodong LIHi Samrat Thank you for sharing the revised schematic. I have thoroughly reviewed the changes. The primary fatal issues that blocked your JTAG communication have been successfully corrected: VDDC core voltage pins (87 & 115) are now tied together with the proper decoupling capacitor network ( C13 and C14 ), ensuring the internal 1.2V digital core logic can now power up and come out of reset. RBIAS (pin 59) is now correctly terminated to GND via a 4.7kΩ resistor ( R12 ), stabilizing the internal PHY circuitry. JTAG lines ( TMS , TDI , TCK ) now have the recommended external strong pull-up/pull-down resistors ( R5 , R6 , R10 ), significantly improving signal integrity. OSC0 jumper is a great addition for flexible grounding configuration if the main internal oscillator is bypassed. A few final recommendations for your PCB Layout & Hardware assembly phase: VDDC Capacitor Value: For C13 , please populate it with a 3.3µF low-ESR ceramic capacitor (rather than 2.2µF ) to align fully with TI's recommended guidelines for the TM4C129x family. Component Placement: During PCB layout, ensure the smaller 0.1µF capacitors ( C14 for VDDC, and C1, C2, C7, C8 for VDD) are placed as close as physically possible to their respective MCU pins to minimize trace inductance. RTC Crystal (X1): Ensure your firmware explicitly configures PM1 and PM2 to their alternative XOSC0/XOSC1 functions to read the 32.768 kHz clock correctly if you are utilizing the Hibernation module. This revised schematic looks solid and ready for the next phase. if you needed, Please let me know how the first boot and JTAG connection go after you implement these hardware changes! Thankshttps://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1691326/lm5148-variation-in-power-conversion-efficiency-at-light-loads/6520815Mon, 26 Oct 2026 09:15:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c4664b64-1828-4793-9850-719ae9510298user5054474Hi, Thank you for the explanation regarding the operating mechanism. Since shunt=6mohm and Vcs-th=60mV(typ), ILIM=10A(typ), and 1/5 of that, 2A(typ), will be the peak inductor current during PFM operation. After replacing about 10 units of the LM5148 and taking actual measurements, the inductor peak current was found to range from a minimum of 0.5 A (at Ton = 285 ns) to a maximum of 2 A (at Ton = 1255 ns), with an average value of 1.2 A (typ). I would like to clarify the following two points: ① The calculated peak inductor current is 2A (typ), yet the measured average current is 1.2A; why is there such a significant discrepancy? ② What is the expected range of variation? Best Reagards,https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1669764/am2434-am243-enhanced-link-communication-issue-for-ethercat/6520814Mon, 26 Oct 2026 09:15:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:72ef1f7e-a374-48a8-85a3-9628e4c18bd3Aaron ThomasHi Yijin [quote userid="703293" url="~/support/processors-group/processors/f/processors-forum/1669764/am2434-am243-enhanced-link-communication-issue-for-ethercat/6514470"]We would like to confirm whether both bit4 and bit5 need to be enabled after enabling bit1 of register 0x0141.[/quote] Yes, ELD (Enhanced Link Detection) is enabled for both ports. [quote userid="703293" url="~/support/processors-group/processors/f/processors-forum/1669764/am2434-am243-enhanced-link-communication-issue-for-ethercat/6514470"]For the output port, however, the counter sometimes increases by 2 or 3 when the cable is unplugged. When re-plugging the cable, the counter may stay the same or increment by 2.[/quote] Are you able to reproduce this in the TI EVM? Regards, Aaronhttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1682693/am2434-am243x-icssg-ethercat-slave-dc-system-time-difference-0x92c-takes-6-7-s-to-converge-and-sometimes-much-longer/6520813Mon, 26 Oct 2026 09:14:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:885f3f3b-0f9d-4453-ae08-e257752b96d2Aaron ThomasHi Marvin, Apologies for the delay and thank you for the details. Let me review and come back. [quote userid="706271" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1682693/am2434-am243x-icssg-ethercat-slave-dc-system-time-difference-0x92c-takes-6-7-s-to-converge-and-sometimes-much-longer/6515542"]Can you reproduce this with the conditions above? Is it a regression in the logic related to PINDSW-9883 / 10745?[/quote] I will try to reproduce the issue. [quote userid="706271" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1682693/am2434-am243x-icssg-ethercat-slave-dc-system-time-difference-0x92c-takes-6-7-s-to-converge-and-sometimes-much-longer/6515542"]Could you provide a fixed version, or a build based on 0x056C with the PINDSW-10745 change removed? [/quote] Let me review the changes to PINDSW-10745 if it is related. Regards, Aaronhttps://e2e.ti.com/support/wireless-connectivity/bluetooth-group/bluetooth/f/bluetooth-forum/1692580/lmr51450-lmr51450fndrrr-component-which-i-am-using-to-convert-12v-to-7v/6520810Mon, 26 Oct 2026 09:11:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:1d480739-b529-4596-b6bd-14b26f21b244Sourish NandyHello Xinyue, The datasheet provides the efficiency information for Vin=12V and Vout=5V for 500kHz frequency. It should be pretty similar to Vout=7V so you can estimate the efficiency for your application using this plot itself. The efficiency generally reduces a bit from the room temperature result at higher temperature due the resistive losses increasing with the temperature. The efficiency is slightly better or nearly same as the room temperatures at lower temperatures. You can use WEBENCH to check the efficiency as a starting point. Regards, Sourishhttps://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1687976/lm5146-interleaved-buck-with-cc-cv-regulation/6520809Mon, 26 Oct 2026 09:11:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b7846dfc-6065-4ff1-b7f4-3df5c9c30fd3DKelektronikHi Manvi Gupta, Thank you for your support. We plan to incorporate your suggestions, conduct evaluation tests using TI's EVM, and then select the optimal solution. Thanks & BR, Ngoc Hoanhttps://e2e.ti.com/support/processors-group/processors/f/processors-forum/1689913/am62l-freertos-sdk-zephyr-os-on-am62l/6520808Mon, 26 Oct 2026 09:11:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f67782fa-38f2-48fe-a7aa-6f108c880e19Swargam AnilHello Ashwini, This version will be supported in the next AM62L release. However, for our upcoming October release, we will be releasing with Zephyr version 4.4 only. Regards, Anilhttps://e2e.ti.com/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/1688089/drv8334-drv8334-sudden-failure-during-high-speed-bldc-blower-operation/6520805Mon, 26 Oct 2026 09:10:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:d0de9663-69a4-41a2-b2e7-53e590de1a5cBhulakshmi NanjamYou have recommend testing with the following settings to see if it resolves the issue: IDRVP_CFG to 1b to enable your settings in the CTRL6 Register (Addr 25h) SGD_MODE to 00b to disable the Turnoff Pre-Discharge Current feature IDRVP (IDRVP_L and IDRVP_H) to 22h (33mA) for a slew rate of 245ns with your FET IDRVN (IDRVN_L and IDRVN_H) to 26h (68mA) for a slew rate of 119ns with your FET But, In the register calculator, it is different.https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1675506/bq40z80-cell-balance-time/6520803Mon, 26 Oct 2026 09:10:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:a9fc21a7-ce8e-4f00-9c97-54b3462450aeAVHi Garrett, Any update from the team on the difference between how cell balancing function is defined between BQ40z50 and BQ40z80. Thanks, AVhttps://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1692367/tps923612-schematic-and-pcb-layout-review-for-six-series-leds-at-350-ma/6520802Mon, 26 Oct 2026 09:10:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c413a1e3-ba92-418b-94d2-9045d92083b4Hongjia-WuHi, What is the input voltage range for your application? I assume it's 1-cell battery application and Vin will vary from 2.5-5.5V. With 6 LEDs × 2.1 V × 350 mA = 4.41 W of LED power out of a 2.5–5.5 V input, the required average inductor (= input) current is: I L(DC) = (V OUT × I OUT ) / (V IN × η) V IN I L(DC) (ideal) I L(DC) @ η = 0.85 2.5 V 1.76 A ~2.08 A 3.0 V 1.47 A ~1.73 A 3.6 V 1.23 A ~1.44 A The TPS923612 switch current limit is 2.25 A typical, 1.95 A minimum, 2.6 A maximum. Peak current is I L(DC) + ΔI L(P-P) /2, so at the low end of the input range your peak exceeds the guaranteed-minimum limit and you will not get 350 mA. You need to define your minimum battery voltage and verify peak current against the 1.95 A worst-case limit, not the 2.25 A typical. Regards, Emma Wuhttps://e2e.ti.com/support/sensors-group/sensors/f/sensors-forum/1692255/awr1642boost-awr1642boost-dca1000evm-always-detecting-a-static-target-at-5-m/6520798Mon, 26 Oct 2026 09:06:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:dcb710d9-4955-4bed-8826-ce5964933eb0Mickael SongIt works, thank you!https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1692103/tpsm843321-tpsm843321-thermal-resistance-calculation/6520793Mon, 26 Oct 2026 09:04:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:cfe171f5-7509-472b-be5c-72202de39c49Ashwini ChHello, My specs are TA=85C 1. Vin 12V, Vout = 5V, Iout =1.2A 1. Vin 12V, Vout = 3.3V, Iout =2A 1. Vin 12V, Vout = 1.2V, Iout =1.6Ahttps://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1684104/tps923650-bad-ringing-of-buck-boost-converter/6520791Mon, 26 Oct 2026 09:02:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:161bba3a-79f7-411e-a4c8-a5d0635b9fe5Waldemar BaumungHi Lucia, Thanks for the feedback. Regarding (1): Talking of "12Vpp" I mean the ripple voltage at the switch node when MOSFET is off. Let me add, that this ripple voltage also appears at the output with similar height, which brings more error into the regulation, making the output voltage lower than it should. Regarding (2): The LED current is just 160mA. But with low input voltages such as 5V, I get like 1.4Apeak. The formulas are fully clear to me. Meanwhile after further testing, I see that the oscillation can be damped by snubber components to a decent level, but causing further oscillations at the falling edge of SW. My guess is, that the layout is not as good as it could be, leading to these parasitic effects/oscillations. This is most probably the root cause for my issues. BRhttps://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1690219/tpsm63603-tpsm63603-emi-issue/6520790Mon, 26 Oct 2026 09:02:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:32920e51-a603-48b6-9fcf-1fcb7f5cfce8Niranjan NairSome things you can try are 1. Use a resistor (in few ohms or tens of ohms) between RBOOT and CBOOT to slow down the switching, which should help with the higher frequency emissions. It can also be kept open to have the slowest switching if needed. 2. Use the spread spectrum variant of the IC : TPSM63606S, this would help reduce the switching frequency peaks 3. Is L2 shielded? If not using that might help with radiated emissions. Increasing the value of L2 would also help with reducing the switching peaks. 4. A symmetrical layout of the input caps (close to the VIN and PGND pins) also helps with EMI. You can refer to the datasheet layout section if you want to optimise the layout.https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1691720/tps62a0568-soft-start-tolerance/6520792Mon, 26 Oct 2026 09:02:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:d061d0bf-f2b0-47db-873a-367eb47b8dd8Muhammad Zakir BaigHi Koshi, I have sent an email to you regarding your concern. Therefore closing this thread for now. Best Regards, Zakirhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1692103/tpsm843321-tpsm843321-thermal-resistance-calculation/6520786Mon, 26 Oct 2026 08:59:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:fe5c9018-5e1e-4d50-a327-53a759ed9a1bHaseen Reddy Siripi ReddyHi Ashwini, Can you please provide your test condition/spec so that we will calculate and provide temperature rise. Regards, Haseen.https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1692389/tlvm23615-maximum-output-capacitance/6520783Mon, 26 Oct 2026 08:57:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:56c170b5-ac19-427e-b048-1412db4268e6Sourish NandyHello, As per the datasheet guidelines, it recommends limiting total output capacitance to approximately 10× the design value or 1000 µF, whichever is smaller 1 . Your 300–400 µF is below the 1000 µF ceiling, so it is within the stated guidance — provided it also satisfies the 10× condition relative to your design value. But it is recommended using load-transient testing and Bode-plot measurements to validate a given output-capacitor design. With larger Cout, we need to take care of the inrush current too. So, it is better to validate it once on the EVM under their operating conditions either on their end or on our end. Regards, Sourish