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<?xml-stylesheet type="text/xsl" href="https://e2e.ti.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title /><link>https://e2e.ti.com/</link><description>&amp;lt;p style=&amp;quot;display:none;&amp;quot;&amp;gt;blank&amp;lt;/p&amp;gt;</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><item><title>Forum Post: RE: AFE5828: 1.2V AVDD/DVDD current suddenly increases significantly in AFE5828</title><link>https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/1654753/afe5828-1-2v-avdd-dvdd-current-suddenly-increases-significantly-in-afe5828/6381748</link><pubDate>Sat, 13 Jun 2026 10:14:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:f3f3d61b-e115-4cba-b3cd-6cb6910dbe3e</guid><dc:creator>Sheetal Gupta</dc:creator><description>Hi Sunmi, DVDD 1.2V is the supply for the ADC digital blocks. It should typically draw 110mA current. Can you please confirm how much extra current is drawn and what is the sampling rate of the ADC? If the SPI is operational, you can power down the ADC using GLOBAL_PDN bit (register 1, bit 0). This will power down the ADC. Similarly, VCA can be powered down using GBL_PDWN (register 198, bit 2). These two bits can power down the device if the SPI signals are independent for each device. If SPI is non-operational, device can be powered down using PDN_GBL pin which is active high pin by applying 1.8V on this pin. Can you also check whether the power sequencing has been followed as given in the datasheet.</description></item><item><title>Forum Post: RE: TLV767: TLV767 in Constant Current Regulator</title><link>https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1652316/tlv767-tlv767-in-constant-current-regulator/6381747</link><pubDate>Sat, 13 Jun 2026 10:05:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:6ce1e2b6-a19d-44c8-97a4-e4d3f3e82e70</guid><dc:creator>Eduardo Linares</dc:creator><description>Hi Alberto, The restrictions would really depend on the configuration you choose. One way to try to achieve a constant current would be to put the load in front of the input pin and then set the output with a set load resistance. The input current will be this set output current + IQ of the device. This could have issues with start up or stability if the input impedance to the LDO is too high. I&amp;#39;m also not sure if you would have issues on turn on since all the inrush current would be passing through the load. The other way I can think of achieving this is by doing this, but the issue is that you would still need a relatively large voltage across the LDO since the ground pin of the LDO is not connected to the common ground. This might not be much better than the LM317 depending on how much current is needed to pass through R1. Gregory Thompson , Is there anything that I missed here? I know we had talked about this situation last week. Regards, Eduardo Linares</description></item><item><title>Forum Post: TPS25730: Schematic Review - TPS25730D</title><link>https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1655112/tps25730-schematic-review---tps25730d</link><pubDate>Sat, 13 Jun 2026 10:04:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:abcf37ff-4aa0-491d-8da6-3651f56c3b47</guid><dc:creator>Irene Binnet</dc:creator><description>Part Number: TPS25730 Hi, Please review the attached schematics using TI PD charger IC (P/N - TPS25730D). Suggest any comments if to be implemented. Thank you. Power.pdf</description><category domain="https://e2e.ti.com/tags/power%2bdelivery">power delivery</category><category domain="https://e2e.ti.com/tags/TPS25730">TPS25730</category></item><item><title>Forum Post: RE: TPS562201: Datasheet collection</title><link>https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1655079/tps562201-datasheet-collection/6381746</link><pubDate>Sat, 13 Jun 2026 09:47:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:c8df3260-a62a-4548-ab88-f143587cde20</guid><dc:creator>Manish Gautam</dc:creator><description>Hi Manikandan, Orientation you can get in the datasheet. Regards, Manish</description></item><item><title>Forum Post: RE: TPS65265: TPS65265 Datasheet</title><link>https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1652735/tps65265-tps65265-datasheet/6381745</link><pubDate>Sat, 13 Jun 2026 09:38:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:4c12bd7f-a4a0-41f6-8d5f-d4739cb096ef</guid><dc:creator>Manish Gautam</dc:creator><description>Hi Tsuchiya, Thanks for highlighting about the table, we will correct the table. EN pin decides the power sequence, so we are providing the timing sequence for the EN pin. But mode pin dont decide the power sequence for the device. It only able to decide that which power sequence mode you are going to use. 1. Automatic power sequencing. 2. External power sequencing. Regards, Manish</description></item><item><title>Forum Post: RE: TMDS64EVM: TMDS64EVM &amp; SPI COMM. &amp; ADS131M08(TI's ADC CHIP)</title><link>https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1653971/tmds64evm-tmds64evm-spi-comm-ads131m08-ti-s-adc-chip/6381744</link><pubDate>Sat, 13 Jun 2026 09:31:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:fe7eab64-15bd-4169-aa06-a82d2a0f4e04</guid><dc:creator>Dong Gyun GIL</dc:creator><description>Have you confirmed this? Can&amp;#39;t ads131m08 be controlled in multi-mode from am6442? Please reply.</description></item><item><title>Forum Post: RE: TPS63710: I am unable to download the PSpice model for the TPS63710.</title><link>https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1652162/tps63710-i-am-unable-to-download-the-pspice-model-for-the-tps63710/6381743</link><pubDate>Sat, 13 Jun 2026 09:27:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:dcb0ebd4-9f3a-42b4-9300-59c85acce382</guid><dc:creator>Manish Gautam</dc:creator><description>Hi Takahiro, Sorry for the delayed response. I will check this and get back to you. Regards, Manish</description></item><item><title>Forum Post: RE: TPS62932: Verification of TPS62932 Enable (EN) Pin Control Scheme</title><link>https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1654685/tps62932-verification-of-tps62932-enable-en-pin-control-scheme/6381742</link><pubDate>Sat, 13 Jun 2026 09:21:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:c021c9b2-1f1c-4d0b-9ab3-6eb343a9c77b</guid><dc:creator>Manish Gautam</dc:creator><description>Hi Bala, We will check this and get back to you. Regards, Manish</description></item><item><title>Forum Post: PGA460-Q1: Not getting echo</title><link>https://e2e.ti.com/support/sensors-group/sensors/f/sensors-forum/1655110/pga460-q1-not-getting-echo</link><pubDate>Sat, 13 Jun 2026 08:59:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:88d98c5e-8a7d-4090-b423-a177dc75b688</guid><dc:creator>Jaya Shree</dc:creator><description>Part Number: PGA460-Q1 Other Parts Discussed in Thread: PGA460 Hello TI Support Team, I am currently working with the PGA460-BOOSTXL EVM along with the transducer daughterboard. I have carefully followed the step-by-step instructions provided in the official TI setup video, but I am unable to receive any echo signal in the GUI. Here are the details of my setup: Hardware: PGA460-BOOSTXL Evaluation Module with the included Transducer Daughterboard. Software: PGA460 EVM GUI. Problem: The device does not register or display any echo data during a burst/listen command. I have attached a screenshot of my GUI window showing my current register settings, thresholds, and the blank echo data plot for reference. Could you please help me troubleshoot why the echo is missing? Let me know if you need me to verify specific jumper configurations, register values, or supply voltages.</description><category domain="https://e2e.ti.com/tags/building%2bautomation">building automation</category><category domain="https://e2e.ti.com/tags/PGA460">PGA460</category><category domain="https://e2e.ti.com/tags/PGA460_2D00_Q1">PGA460-Q1</category></item><item><title>Forum Post: TMS320C6655: Nor flash device open fail</title><link>https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1655109/tms320c6655-nor-flash-device-open-fail</link><pubDate>Sat, 13 Jun 2026 08:42:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:21caafbd-c6ea-49f1-b0e1-1b8ff0100d64</guid><dc:creator>Fartine Tripoli</dc:creator><description>Part Number: TMS320C6655 Hi, I&amp;#39;m using MT25QU128ABA nor flash device with TMS320C6655. Nor flash is upgraded in remote in Nor boot always. The platform device open fails intermittently. can you suggest a way to troubleshoot the issue? Regards, Fartine.</description><category domain="https://e2e.ti.com/tags/Industrial%2bAutomation">Industrial Automation</category><category domain="https://e2e.ti.com/tags/TMS320C6655">TMS320C6655</category></item><item><title>Forum Post: BQ2970: Reverse Polarity protection using BQ29707 in 1s2p battery pack configuration</title><link>https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1655107/bq2970-reverse-polarity-protection-using-bq29707-in-1s2p-battery-pack-configuration</link><pubDate>Sat, 13 Jun 2026 08:37:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:28f55cf7-2539-46f7-a9bc-735a7069aea2</guid><dc:creator>RAJESH Kumar</dc:creator><description>Part Number: BQ2970 Hi, I am planning to design a 1s2p battery pack protection circuit using BQ29707DSER and two back-back NMOS. It works fine when only one chip is used. But for reverse polarity protection design requirement - like one cell is inserted wrongly in the battery pack, I am planning to use one BQ29707 chip per individual cells with dedicated back-back NMOS switches and connect in parallel. I understand that in normal operation, BQ29707 will do the UV, OV and SC protection. But if one of the cells is inserted in reverse polarity, will this circuit configuration work to protect the cells from getting damaged. I will cascade Pack+/Pack- to another cell with similar configurations. Or, could you please suggest some simpler circuit configuration using TI chips and FETs. Please let me know if you require further details. Best Regards, Rajesh</description><category domain="https://e2e.ti.com/tags/BQ2970">BQ2970</category></item><item><title>Forum Post: RE: TAD5112: TAD5112 cannot play 16-bit stereo</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1654836/tad5112-tad5112-cannot-play-16-bit-stereo/6381737</link><pubDate>Sat, 13 Jun 2026 08:22:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:7cf6876c-0f14-4a3f-8319-e9d71b46d9b0</guid><dc:creator>hangxiang guo</dc:creator><description>cowa@thor:~$ i2cdump -f -y 7 0x50 No size specified (using byte-data access) 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef 00: 00 00 01 00 00 15 35 00 00 00 00 00 00 00 00 00 ..?..?5......... 10: 52 80 00 00 00 00 00 00 40 00 30 00 01 00 00 01 R?......@.0.?..? 20: 02 03 04 05 06 07 01 00 20 21 02 03 04 05 06 07 ???????. !?????? 30: 00 00 00 00 40 00 00 20 00 00 00 00 00 10 50 00 ....@.. .....?P. 40: 80 20 11 54 00 00 00 00 00 00 00 00 2e 0c 00 00 ? ?T.........?.. 50: 04 00 a1 80 00 04 00 a1 80 00 00 a1 80 00 00 a1 ?.??.?.??..??..? 60: 80 00 00 00 20 20 20 78 80 78 80 20 20 20 78 80 ?... x?x? x? 70: 78 80 18 18 00 00 0c a0 40 0c f0 00 c0 10 f3 00 x???..??@??.???. 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................</description></item><item><title>Forum Post: RE: ISOW1050: no stock to order</title><link>https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1654574/isow1050-no-stock-to-order/6381736</link><pubDate>Sat, 13 Jun 2026 08:14:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:3cfed55c-0534-4616-9625-fcd555fdd051</guid><dc:creator>ace jojo</dc:creator><description>You can try logging into LinkedIn; we&amp;#39;ve discussed this.</description></item><item><title>Forum Post: RE: TLV320DAC3100: Plexus part # YN-32031-800C-571 || TI MPN:TLV320DAC3100IRHBR || Plexus Seaside</title><link>https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1655100/tlv320dac3100-plexus-part-yn-32031-800c-571-ti-mpn-tlv320dac3100irhbr-plexus-seaside/6381735</link><pubDate>Sat, 13 Jun 2026 08:12:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:f57a35ea-b40a-4478-885f-b64edb14ef4c</guid><dc:creator>ace jojo</dc:creator><description>DigiKey has it in stock. Here is their staff contact information: +85259975614</description></item><item><title>Forum Post: RE: TPS562201: Datasheet collection</title><link>https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1655079/tps562201-datasheet-collection/6381734</link><pubDate>Sat, 13 Jun 2026 08:11:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:db6b30d0-3c50-4eea-a4e9-e0edef95bde3</guid><dc:creator>Manish Gautam</dc:creator><description>Hi Manikandan, We will check this and get back to you. Regards, Manish</description></item><item><title>Forum Post: TMS320C6745: TMS320C6745DPTPD4 Debug issue. (PRSC module failed to write to a router register)</title><link>https://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1655106/tms320c6745-tms320c6745dptpd4-debug-issue-prsc-module-failed-to-write-to-a-router-register</link><pubDate>Sat, 13 Jun 2026 08:08:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:744ecfdb-fa87-4295-8850-5c3522b58e6e</guid><dc:creator>Snehal  Sawant</dc:creator><description>Part Number: TMS320C6745 Hi Team, We are a manufacturer of engineering educational trainer kits and have developed a DSP development kit based on the DSP320C6745CPTPD4 processor. For program loading and debugging, we use the XDS100v2 JTAG emulator. Recently, we received the DSP320C6745 D PTPD4 device instead of the DSP320C6745 C PTPD4 that we have been using in our board. After replacing the processor with DSP320C6745DPTPD4, we encountered the following error while attempting to connect and debug the target: &amp;quot;C674X_0: Error connecting to the target: (Error -6305) PRSC module failed to write to a router register. (Emulation package 9.6.0.00172)&amp;quot; To verify the issue, we replaced the DSP320 D 6745DPTPD4 with the original DSP320 C 6745CPTPD4 on the same board, and the system worked correctly without any debugging or connection issues. We would appreciate your assistance in understanding the differences between these device variants and guidance on how to successfully connect to and run programs on the DSP320C6745 D PTPD4 device. Thank you for your support. We look forward to your response. Thanks, Snehal</description><category domain="https://e2e.ti.com/tags/TMS320C6745">TMS320C6745</category><category domain="https://e2e.ti.com/tags/Connected%2bperipherals%2b_2600_amp_3B00_%2bprinters">Connected peripherals &amp;amp; printers</category></item><item><title>Forum Post: TMS320F28P650DK: EtherCAT: Failed to upload SDO when final address is odd</title><link>https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1655105/tms320f28p650dk-ethercat-failed-to-upload-sdo-when-final-address-is-odd</link><pubDate>Sat, 13 Jun 2026 07:50:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:5e5a77b7-2356-4add-a377-e379774e5b1e</guid><dc:creator>Jianyu Wang</dc:creator><description>Part Number: TMS320F28P650DK Hi TI experts, We have an application that we use TMS320F28P650DK to replace our old product. We found an issue that the new device cannot go OP using the old XML. We identify the issue is that, the EtherCAT Master cannot read the SDO response if SM1 length is Odd. The configuration of our old xml is like follows, The start address of SM1 is 0x1110 and length is 253. The final byte is odd address. When the length is changed to 252, then the drive can go OP. We are using beckhoff SSC stack. In function MBX_CopyToSendMailbox() in file mailbox.c, there is HW_EscWriteWord(u16dummy,(u16EscAddrSendMbx + u16SendMbxSize - 2)); that writes final dummy byte to SM1. We are able to identify that, if (u16EscAddrSendMbx + u16SendMbxSize - 2) is even, ESC register 0x80c, memory 0x50406 becomes 0x0232, that successfully read by host, after this line is executed. Buf if (u16EscAddrSendMbx + u16SendMbxSize - 2) is odd, memory 0x50406 stays 0x8032, that SM1 is still in written. Which blocks host to read the SDO response. This is a quite important application that some of the customers are reluctant to change XML, as old drives are still in use.</description><category domain="https://e2e.ti.com/tags/Industrial%2bAutomation">Industrial Automation</category><category domain="https://e2e.ti.com/tags/TMS320F28P650DK">TMS320F28P650DK</category></item><item><title>Forum Post: AM263P4-Q1: AM263P4 MCAN RX Interrupt Triggering Continuously Even Without CAN Traffic</title><link>https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1655104/am263p4-q1-am263p4-mcan-rx-interrupt-triggering-continuously-even-without-can-traffic</link><pubDate>Sat, 13 Jun 2026 07:45:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:7bf2db31-18c8-4e0b-8cd6-146a3e991dac</guid><dc:creator>Rapeti  Sravanthi</dc:creator><description>Part Number: AM263P4-Q1 Other Parts Discussed in Thread: AM263P4 Hi Team, I am working on MCAN implementation on the AM263P4 LaunchPad with the following configuration: Nominal Bit Rate: 1 Mbps Data Bit Rate: 4 Mbps (CAN FD) MCAN Instance: MCAN3 RX Interrupt routed to Line 36 ( R5FSS0_CORE0_INTR_MCAN3_MCAN_LVL_INT_0 ) TX Interrupt routed to Line 37 (R5FSS0_CORE0_INTR_MCAN3_MCAN_LVL_INT_1) For testing, I am using PCAN-View to transmit CAN FD frames. No data is being transmitted from PCAN-View, and no valid CAN frames are being received by the AM263P4. However, the RX ISR is triggering continuously. During debugging, I observed the following: The MCAN_IR register has multiple interrupt flags enabled after power-on reset (POR). We are attempting to clear the ARA bit in MCAN_IR during initialization, but it does not appear to clear. The bit remains set when observed through the CCS Memory Browser. Only the required RX-related interrupts are routed to Interrupt Line 0 and TX-related interrupts are routed to Interrupt Line 1.The ARA interrupt is not routed to either interrupt line.Despite this, the RX ISR continues to trigger repeatedly even when there is no CAN traffic on the bus. Is it expected for the ARA bit in MCAN_IR to remain set after writing a &amp;#39;1&amp;#39; to clear it? Can a pending ARA condition cause continuous interrupt generation even when it is not mapped to any interrupt line and what causes teh interrupt ARA to occur do we need to do any other configurations? I have attached screenshots showing: TX interrupt configuration RX interrupt configuration MCAN_IR register contents showing the ARA bit status as 1 even though it is being cleared explicitly. Regards, Sravanthi R.</description><category domain="https://e2e.ti.com/tags/AM263P4">AM263P4</category><category domain="https://e2e.ti.com/tags/AM263P4_2D00_Q1">AM263P4-Q1</category></item><item><title>Forum Post: RE: TPS542951: TPS542951PWPR Pin Function Mismatch: PG vs SS Pins (6 and 11)</title><link>https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1648577/tps542951-tps542951pwpr-pin-function-mismatch-pg-vs-ss-pins-6-and-11/6381732</link><pubDate>Sat, 13 Jun 2026 07:43:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:e5bce6e6-31c2-4bf4-825e-1c674a48fa2c</guid><dc:creator>Carmen Iglesias</dc:creator><description>Hello, I’m reviewing the TPS542951PWPR datasheet and noticed something that seems inconsistent. In the pinout and pin description sections, the device includes PG1 and PG2 signals. However, in the block diagram and also in the recommended layout examples, these pins are not shown. Instead, I only see SS1 and SS2. Could you please clarify whether this is a documentation error? Alternatively, is there a more recent version of the datasheet where this has been corrected? Thank you in advance for your support. Best regards,</description></item><item><title>Forum Post: RE: CC1314R10: CC1314R10 Standby Current Consumption Significantly Higher Than Datasheet Specification - EnergyTrace Measurement</title><link>https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/1648040/cc1314r10-cc1314r10-standby-current-consumption-significantly-higher-than-datasheet-specification---energytrace-measurement/6381730</link><pubDate>Sat, 13 Jun 2026 07:31:00 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:20e5a00c-ae91-4e38-ac4b-1ade24857caf</guid><dc:creator>Dharani Prabha</dc:creator><description>Hi Siri, Issues Fixed We encountered and resolved several issues during our power optimization journey. I have fixed the previously mentioned issue, which was caused by AONEventMcuWakeUpSet(AON_EVENT_MCU_WU0, AON_EVENT_RTC_CH0) being called during initialization. Before entering sleep, I was setting the compare value on RTC CH0 to wake up the MCU. Since both of these events were using CH0, the MCU was unable to enter deep sleep properly, resulting in a current consumption of approximately 1.08 mA. Commenting out the AONEventMcuWakeUpSet() call and using RTC CH0 exclusively for our application alarm resolved the issue completely. Current Application Design Flow Our wireless sensor application follows the state machine described below. On power-up, the MCU initializes the board, configures the AON RTC using CH0 for the application alarm, and opens the RF driver. It then enters the INIT state, where it initializes the RF, reads the device MAC address, and transitions to the JOIN_NETWORK state. In the JOIN_NETWORK state, the MCU tunes to a selected channel by calling RF_runCmd() with the CMD_FS frequency synthesizer command to program the RF frequency. It then listens for a gateway beacon, transmits a join request, and waits for a join response. Once the device joins the network, it enters the SLEEP state for 30 seconds. After successfully joining the network, the MCU transitions to the WAIT_FOR_CFG state, where it requests sensor configuration from the gateway. The configuration response contains the reporting interval and data collection interval, which are stored and used for subsequent sleep scheduling. Before entering sleep, the application cancels all pending RF commands using RF_cancelCmd() , waits for the cancellation to complete using RF_pendCmd() , yields the RF driver, and closes the RF handle using RF_close() . It then calls Power_sleep(PowerCC26XX_STANDBY) , allowing the MCU to enter true standby with a current consumption of approximately 0.0023 mA. Upon wakeup, the MCU reinitializes the RF driver, determines the next state based on timing, collects sensor data, updates the RF frequency using RF_runCmd() with CMD_FS , transmits the sensor data, receives the acknowledgement, and then returns to sleep for the configured reporting interval. This cycle repeats continuously. Current Observation We are pleased to report that, after applying the fixes described above, the standby current consumption is consistently 0.0023 mA across multiple wake-up cycles when only RF open and RF close operations are performed. The measured current values are as follows: Standby with no RF activity: 0.0023 mA After RF_open() only: 0.0023 mA After executing RF_runCmd() with CMD_FS : 1.08 mA // CMD_FS // Frequency Synthesizer Programming Command rfc_CMD_FS_t RF_cmdFs = { .commandNo = 0x0803, .status = 0x0000, .pNextOp = 0, .startTime = 0x00000000, .startTrigger.triggerType = 0x0, .startTrigger.bEnaCmd = 0x0, .startTrigger.triggerNo = 0x0, .startTrigger.pastTrig = 0x0, .condition.rule = 0x1, .condition.nSkip = 0x0, .frequency = 0x0362, .fractFreq = 0x0000, .synthConf.bTxMode = 0x0, .synthConf.refFreq = 0x0, .__dummy0 = 0x00, .__dummy1 = 0x00, .__dummy2 = 0x00, .__dummy3 = 0x0000 }; int wcs_prop_rf_set_freq_cmd(uint16_t u16_freq, uint16_t u16_fract_freq) { int ret_val = 0; RF_CmdHandle cmd_handle = RF_cancelCmd(rfHandle, RF_CMDHANDLE_FLUSH_ALL, 0); if(cmd_handle &amp;gt;= 0) { RF_EventMask e = RF_pendCmd( rfHandle, cmd_handle, RF_EventLastCmdDone | RF_EventCmdCancelled | RF_EventCmdAborted |RF_EventCmdStopped); printf(&amp;quot;RF cancel event = 0x%08X\n&amp;quot;, (uint32_t)e); } /* Yield RF core -&amp;gt; powers down -&amp;gt; */ /* releases DISALLOW_STANDBY! */ RF_yield(rfHandle); /* Set the frequency */ RF_cmdFs.frequency = u16_freq; RF_cmdFs.fractFreq = u16_fract_freq; RF_cmdFs.startTrigger.triggerType = TRIG_NOW, // Force immediate execution //dharani - powOP RF_runCmd(rfHandle, (RF_Op*)&amp;amp;RF_cmdFs, RF_PriorityNormal, NULL, 0); //dharani - powOP g_freq_update_sts = RF_cmdFs.status; //dharani - powOP //Here event mask is set to 0. So no errors will be received return ret_val; } Using the sleep () or usleep () cause the MCU to be in Idle state means the MCU consumes 700 uA current approximately. Could you please help us understand why executing the CMD_FS command causes the standby current to increase to 1.08 mA, and suggest any additional steps required to return the device to the expected low-power state? Is there any driver API available to configure the RTC and use it as a wake-up source for the MCU from deep sleep? If so, could you please provide the recommended approach or any reference examples? Regards, Dharani</description></item></channel></rss>