Natan,
Rp/Rd would be R26 / (R18+R15) which is on either side of the opto (see attached). So R26 does have an impact on gain of the entire loop gain, but not on the transfer function of the TPS4021x internal E/A (R17 and R24) I mentioned previously.
…
Renan,
I will try to explain its function.
OVP:
The OVP block simply turns off the PFET above approx the zener threshold voltage. The base of QOVS (PNP) is held at a constant voltage of 18V. When the input voltage exceeds Vz +V_DBLK + V_QOVDe-b = 18V…
Karan,
Unfortunately, I do not have that level of detail on the transformer (part number Wurth 750315626). Please contact Wurth directly about any technical information about it since they are the primary designer of it and should be able to help you…
Hi,
L2 was the inductor chosen for this reference design and is documented in the test report data. L1 is simply an alternative inductor footprint, overlaid on top on L2, in case it was decided to use a larger package. This adds flexibility in the PCB…
Hi Rick,
Information on the operation of the controller is within the UCC28730 datasheet. Paragraph 7.3.7/8 and detail the controller's startup behavior. There are many modes or states of operation for this device. In this particular application, where…
Charles,
The CSD17577Q3A FET is rated at 30V, which is very likely the issue.
In the PMP20183 circuit, the FET will see Vout/3 = 200V/3 = 66V, since it has a voltage tripler. If your application is 180V, the FET will see about 60V. It is very likely the…
Charles,
Running the output voltage at 180V should not be a problem, since lowering Vout creates less voltage stress in the power stage.
The output voltage set equation is: Vout = 1.275V * (1 + (R2+R100+R3)/R8))
Lower the values of R2+R100+R3 to 887K…
Mike,
I agree with Bernd.
Attached is a blog which has a bit more detail on the on the level shifter. The values shown should work in most instances.
Power Tips Synchronize your SEPIC.pdf
