Part Number: ADC08D500 Hello,
The datasheet recommendation for the VCMO loading is no more than 100uA and 80pF.
What should be the value of Riso with CL=100nF?
What could be the consequence if Riso too small? Could the VCMO output oscillate?
In advance…
Part Number: ADC08D500 Other Parts Discussed in Thread: ADC08D502 , Hi team,
Both ADC08D500 and ADC08D502 different are D500 can interleave to 1GBPS per channel but D502 only 500MBPS.
Besides both device performance are same? thanks!
Part Number: ADC08D500 When we used ADC chip ADC08D500, we found that the output of ADC chip had burr and the working temperature was very high. The surface temperature was measured at 70℃ with an infrared thermometer.
After many measurements, the conclusion…
Part Number: ADC08D500 I have a project for which we only would use one input of the ADC08D500. For this case, the active channel would be DC coupled and its common mode would be generated by a differential amplifier using the ADC VCMO output. Can I eave…
Part Number: ADC08D500 Other Parts Discussed in Thread: ADC083000 Hi
If we have two ADC08D500s to work together in Interleaving, do we need a Delay Line IC pair on the ADC CLK Input side? (individual)
Part Number: ADC08D500 Hi team,
My customer is testing our ADC08D500 in a DSO project. And we met below issue:
1. When set the device to normal dual channel mode, the device works well and the DCLK pin output clk signal is present. The register configuration…
Part Number: ADC08D500 There is a problem while using ADC08D500 to sample a analog signal. Set DES mode as the operation mode and 1Gsps sample rate, and use FPGA to get the ADC data. the circuit was used to measure the signal delay.
The ADC output clock…
Other Parts Discussed in Thread: ADC08D500 , ADC08D1020 Hi,
I am using ADC08D500 as Analog to Digital Converter. I would like to generate test pattern to test the digital interface between ADC(ADC08D500) and FPGA. I am not sure how to generate test pattern…
Other Parts Discussed in Thread: ADC08D500 , LMH6518 , ADC08D1020 We are interested in using the ADC08D500 running at 1GSPS in Interleave mode. The input signal is 1Vp-p max, and we would like to use a variable gain amplifier between the RF input and the…
