Part Number: ADC122S021 Tool/software: Hello,
In ADC122S021, the data transfer in performed in frame-by-frame. Each frame contains 16 SCLK cycles.
As per table3 description in datasheet for ADD0-ADD2 bits is given as - "These three bits determine…
Part Number: ADC122S021 Tool/software: Hi expert, We want to promote TI's devices to replace below competitor, could you help to recommend TI's suitable devices? Thanks.
MCP3202-CI/SN SOP-8 (MICROCHIP)
AD7655ASTZRL TSSOP-16 (ADI)
Best Regards…
Part Number: ADC122S021 Other Parts Discussed in Thread: ADS7230 Tool/software: Hi,
I am considering replacing the Microchip MCP3202T-BI. https://www.farnell.com/datasheets/1669376.pdf
The following are the selection criteria. The ADC122S021 would…
Part Number: ADC122S021 Other Parts Discussed in Thread: ADC128S102 Hi team,
Could you let me know the input channel right after the /CS falling edge? Is it default (CH1) or the channel set in the previous conversion cycle?
Do you recommend to keep…
Part Number: ADC122S021 Other Parts Discussed in Thread: ADC124S101 Hi team,
What is the EVM and GUI for ADC122S021 (8-pin VSSOP with body size of 3mm x 3mm)?
In ADC122S021's product folder, ADC124S101EVM is included and in the description of the…
Part Number: ADC122S021 Other Parts Discussed in Thread: ADC122S625 , ADC122S655 , , ADC122S706 , ADC121S101 , ADCS7476 Hi team,
Any other ADC with higher temperature support up to 125C, AND continuous conversion without resetting /CS pin like below…
Part Number: ADC122S021 Other Parts Discussed in Thread: ADC122S051 , ADC122S101 Hi team,
There is application that ADC122S021 is used with /CS pin low for continuous conversion, but can customer use /CS pin to reset ADC, i.e. to toggle /CS pin to start…
Part Number: ADC122S021 Hi We already use the this ADC and read out the data continuously with an FPGA. At the moment we generate 32 Clock cycles with CS=LOW and 2 extra cycles with CS = HIGH. I´m not sure if it is possible/allowed by the datasheet to…
Part Number: ADC122S021 On the datasheet page 6~ page7, Figure 1 and Figure3, ADD0 will be read at 5th rising edge after /CS low. But the MSB of data seems already shifted out at 5th falling edge after /CS low, ahead of ADD0. Since ADD0 determinate which…