Hi,
I have the same problem, Kindly solve.
Installed WV5 latest release from the website. I have SPIO-4. It is not detecting in WV5.
I have connected LMP90100EVA to it, using LMP90100 application, it is working fine.
Waiting for the reply
Regards,
…
Other Parts Discussed in Thread: LMX2531 Hi everybody,
I work to write VHDL code to read ADC value form ADC chip. I recognized that, LMX2531 PLL configured by Cypress chip. Can you write me LMX2531 PLL chips register settings. Because I wrote all codes…
Hi,
The attached documents are a good place to get started. Beyond that, we don't provide specific support for programming via the DLL. As Mike suggested, getting started has been a common question and you may find some useful tips by searching the…
Hi all,
If you are trying to order a GSPS ADC Reference Board for evaluation, there is some good news! The National Semiconductor products have now been fully integrated into Texas Instrument's ordering systems and it is possible to order a GSPS ADC Reference…
Hi Nikola
Please see the FPGA firmware source contained in the ADC12D1600RB/ADC12D1800RB Design Package which is available in the software section of this web page:
http://www.ti.com/tool/adc12d1600rb
I believe in this firmware only one of the DCLK inputs…
Part Number: ADC12D1800 I have purchased the ADC12D1800RB and I have been trying to intentionally introduce bandwidth mismatch spurs (dynamic gain and amplitude) in DES mode for research purposes. So far, I tried several setups, and none of them presented…
Hello Rosanah,
We offer the ADC12D1800RB which is an evaluation board with a Virtex-4 Xilinx FPGA included. It uses the WaveVision5 software to load the FPGA firmware image and communicate with the device. You can find out more by visiting the ADC12D1800RB…
Hi xiaolu
I gathered data using the ADC12D1800RB at 500 MSPS. Here are the results:
/cfs-file/__key/communityserver-discussions-components-files/73/4137.ADC12D1800-500MSPS-Fin-260-and-408.pdf
You have identified your large spur location as 2Fin-Fs. 2Fin…