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  • ADC12DJ3200: Inquiry Regarding X‑ray and C‑SAM Screening for ADC12DJ3200 QMLV (5962F1820901VYF) and Request for Sample Data

    TI Thinks Resolved
    Part Number: ADC12DJ3200 Dear Texas Instruments Support Team, I hope this message finds you well. We designed in your 5962F1820901VYF (ADC12DJ3200QML‑SP) device for use by our customer in an aerospace application. We understand that this device…

  • ADC12DJ3200:2 ADCs(4ch ) Sync

    Part Number: ADC12DJ3200 Other Parts Discussed in Thread: LMK04828 Dear Technical Support Team, I'm considering a solution based on JESD204B Subclass 1, using a combination of Zynq UltraScale+ and a suitable ADC. I'm are currently focusing on two…

  • ADC12DJ3200QML-SP: ADC12DJ3200 JMODE16 Links/Lanes Question

    Part Number: ADC12DJ3200QML-SP I'm using the ADC12DJ3200QML-SP in JMODE16. Based on table 6-18 (sheet 65) in the datasheet, this should set the ADC to operate with 2 JESD links, each with 1 lane, where each lane is the I/Q data from one of the two ADCs…

  • ADC12DJ3200: Mechanical sample/dummy for ADC12DJ3200NWE/EM

    Part Number: ADC12DJ3200 We are looking for a mechanical sample/dummy for the component ADC12DJ3200NWE/EM. We don't need a functional parts we just need a component with the same package to perform assembly validations trials .

  • ADC12DJ3200: adc12dj3200

    Part Number: ADC12DJ3200 Tool/software: Hi! I have a problem when using adc12dj3200. The ADC is set to JMODE 0, but DA1 in the A link is corrupted. I tried using the JEXTRA_A register mentioned on page 119 of the ADC12DJ3200 manual, using DA4 to DA7…

  • ADC12DJ3200: Configure using labVIEW

    TI Thinks Resolved
    Part Number: ADC12DJ3200 Tool/software: is there a way to configure this EVM using labVIEW. or ADC12DJxx00 GUI control using labVIEW? I wan to configure ADC12DJ3200 EVM using labVIEW as part of bigger application which is developed in labVIEW

  • ADC12DJ3200: Multi ADC Synchronization

    TI Thinks Resolved
    Part Number: ADC12DJ3200 Other Parts Discussed in Thread: LMX2594 Tool/software: Hi, I am trying to phase synchronize the outputs of two ADC12DJ3200 IC's. I configured the ADC12DJ3200 to JMODE-6 (8-bit, 4-lanes, dual channel) by setting the following…
    • Answered

  • ADC12DJ3200: SYSREF signal question

    Resolved
    Part Number: ADC12DJ3200 Tool/software: Hi expert, My customer is evaluating ADC12DJ3200, they want to know if the SYSREF can be set to 0V or let them float after the JESD204B connection is successfully established? Appreciate your reply. Best Regards…
    • Resolved

  • ADC12DJ3200: Autosysref Calibration - Reg

    TI Thinks Resolved
    Part Number: ADC12DJ3200 Tool/software: Dear Team, Can I perform the autosysref calibration process while the RF Input is in On condition and subjected to RF ADC. Regards, Indujha S

  • ADC12DJ3200: Gain miss-matching between ADC banks under single channel interleaving mode and Gain trimming register

    TI Thinks Resolved
    Part Number: ADC12DJ3200 Hi, We are using ADC12DJ3200 at the moment for data acquisation. The sample clock we having now is 2.5GHz. We are interleaving all four ADC banks to get 5Gsps sampling rate in total, and found that there is a 1.25GHz spur that…

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