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  • RE: ADC12DJ3200EVM: External clock mode not working even after hardware modifications specified

    Resolved
    This works for 1 GHz, Thanks Rob. Is there any specific reason for it not working for 800 MHz, and if possible can we make it work for lower frequency clock say 500 or 600 MHz?
    • Answered

  • RE: ADC12DJ3200EVM: Able to make JMODE2 work but JMODE2 when we change L = 1 and JMODE13 are not working

    Resolved
    Hi Neeraj, Thanks a lot for the detailed explanation, I am now able to proceed with my work. Jaswanth
    • Answered

  • ADC12DJ3200EVM: Number of JESD204 Links

    Resolved
    Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: ADC12DJ3200 In the reference FPGA designs provided by TI for the JESD204B connection to the adc12dj3200, the JESD204 links seem to only have 1 link. The ADC12DJ3200 datasheet mentions 2 links…
    • Resolved

  • ADC12DJ3200EVM: JMODE0, Data Format

    Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: ADC12DJ3200 I am using the example design for the ADC12DJ3200 JMODE0 connected to the KCU105 board. I am having trouble converting the data to a datastream once I get it into chipscope. I ran…
    • Answered

  • ADC12DJ3200EVM: LMX not locking

    Resolved
    Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: ADC12DJ3200 , , LMX2582 Hello, We have an ADC12DJ3200EVM board and have attempted to program the ADC, LMK, and LMX through the ADC12DJ3200 GUI. Currently the LMX and LMK are not locking, are there…
    • Resolved

  • ADC12DJ3200EVM: RX Elastic Buffer Underflow

    Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: LMK04832 Good afternoon, I am running the KCU105 example design for ADC12DJ3200EVM. It appears that the RX Elastic Buffer is underflowing: What could this be caused by?
    • Answered

  • ADC12DJ3200EVM: AD12DJ3200 GUI subclass1

    Resolved
    Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: ADC12DJ3200 , LMK04828 Hi team What settings to be enabled in ADC12DJ3200 GUI for JESD204B subclass1 ? How to set for SYSREF clock?- -trs
    • Resolved
    • Answered

  • RE: ADC12DJ3200EVM: adc12dj3200evm Not Working - Setup Question

    Resolved
    Hi Neeraj, I thought that I sent this already, my apologies. However, while digging into this board a WHOLE lot, i have other concerns and i think they they would be best answered within a separate thread, so i'm going to consider this one closed.…

  • ADC12DJ3200EVM: Using external clock to drive the ADC without board modifications

    TI Thinks Resolved
    Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: LMK04828 , , LMX2582 Our system needs to have synced clocks between this ADC and some other part. Ideally, they would share a 2.66 GHz clock for acquisition. I am aware of the possibility to modify…

  • ADC12DJ3200EVM: KCU105 FPGA design for ADC12DJ3200EVN

    TI Thinks Resolved
    Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: ADC12DJ3200 , Hello, I'm using a KCU105 and a adc12dj3200evm. The current version of ADC12DJ3200/Xilinx KCU105 design on the TI website was done with Vivado 16.1. The licenses for the JESD…

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