Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: LMK04828 , , LMX2582 Our system needs to have synced clocks between this ADC and some other part. Ideally, they would share a 2.66 GHz clock for acquisition. I am aware of the possibility to…
Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: ADC12DJ3200 Hi team
May I know the scenarios where you observe JESD204B Rx lane buffer overflow issue? I have been trying interoperability of ADC12DJ3200 with FPGA. Once both the devices are…
Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: ADC12DJ3200 , We are in the process to use ADC12DJ3200 chip in our design.
Could you share ADC12DJ3200EVM reference schematic?
Thanks,
Jimmy
Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: ADC12DJ3200 , LMK04828 Hi team
I am doing interoperability test of ADC12DJ3200 with my FPGA. My sampling sampling frequency 1250 Msps and i am using JMODE 2. My line rate is 5 Gbps and LMK04828…
Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: TSW14J57EVM , Hi,
I'am currently working on a data capture system for a multiscale communications system. ADC12DJ3200EVM and TSW14J57EVM boards are more than enough for capturing desired analog…
Part Number: TSW14J10EVM
I want to use the TSW14J10EVM as intermediary card between the ADC12DJ3200EVM and my KU115 based FPGA platform (not from XIlinx).
I found in the TSW14J10EVM a setup that does not require FPGA jtag connection between FPGA board…
Part Number: ADC12DJ3200EVM Other Parts Discussed in Thread: ADC12DJ3200 Hello,
I found this excellent presentation ( https://training.ti.com/microsemi-rtg4-fpga-texas-instruments-adc12dj3200-0 ) demonstrating a working example of an ADC12DJ3200 interfaced…
Hi Brandon,
Some ripple suppression is seen, but probably not as much as you may want.
What is the goal of the input network? 10GHz@-3dB ? Passband flatness of 1dB? What is the max you can live with?
Keep in mind the flatness of the frequency response…
