Part Number: ADC12DJ3200QML-SP Hello, How are you?
I have some questions about this part because I am working on the design of this part ADC12DJ3200QML-SP and I can´t find the information about the SPI pins in this datasheet www.ti.com/.../adc12dj3200…
Part Number: ADC12DJ3200QML-SP Other Parts Discussed in Thread: LMX2615-SP , It appears that my LMX2615-SP clock synthesizer powers up with its output active.
At that time, my ADC12DJ3200QML-SP may not be powered-up yet.
Will the unpowered ADC12DJ3200QML…
Part Number: ADC12DJ3200QML-SP Hello,
What are the power pins decoupling capacitor guidelines for the ADC12DJ3200QML-SP ? How many caps, what cap value ?
I can't find anything in the datasheet.
Thanks
Part Number: ADC12DJ3200QML-SP Other Parts Discussed in Thread: LMX2615-SP , ADC12DJ3200 My application :
I plan on using the ADC12DJ3200QML in single-channel mode (A/B interleaved) with a 2.5GHz sampling clock, JMODE 0 (10Gbps lanes) and subclass 0 (no SYSREF…
Part Number: ADC12DJ3200QML-SP Other Parts Discussed in Thread: ADC12DJ3200 I want to know whether TI has a System Verilog model of the ADC12dj3200qml-sp ADC. I want to use it for simulating my FPGA interface. All I require is the JESD204B interface section…
Part Number: ADC12DJ3200QML-SP Hello,
My application will use the ADC12DJ3200QML in JMODE0 (single-channel) and subclass 0 (single device, no SYSREF synchronization).
According to ADC datasheet, the JESD204B synchronization is initiated by the FPGA (data…
Part Number: ADC12DJ3200QML-SP Hello,
My customer has a question about the digital interface circuit of the ADC12DJ3200QML-SP.
The reference circuit of the ADC12DJ3200ML-SP's digital interface is as follows.
The customer thinks that since the JESD204B…
Part Number: ADC12DJ3200QML-SP Hello,
My application will use the ADC12DJ3200QML in JMODE0 (single-channel) and subclass 0 (single device, no SYSREF synchronization). While my application does not need synchronization nor accurate knowledge about latency…
Part Number: ADC12DJ3200QML-SP Hello,
My customer has a few questions about the ADC12DJ3200QML-SP.
They want to use the ADC12DJ3200QML-SP with the following conditions.
- Dual-channel mode with DDCA, 16 decimation 2 lanes or 1 lane
- Input Signal …