Part Number: ADC12DJ5200RF Hello TI Team,
I am currently using the ADC12DJ5200RF, and I would like to inquire about the following two points regarding the Electrical Characteristics section.
1. Regarding “excludes DC offset” stated in the test conditions…
Part Number: ADC12DJ5200RF Other Parts Discussed in Thread: LMK04832 , LMX2594 Hi,
I am using a custom Board with XCVU13P FPGA.
The custom board consist of 4 ADC12dj5200RF, 2 LMX2594 chips and 1 LMK04832 chip.
ADC1 and ADC2 are working in 5000Msps…
Part Number: ADC12DJ5200RF Tool/software: I would like to know how you test the enob of the adc12dj5200rf, whether it needs to be connected to a bandpass or low-pass filter, and whether the signal source and receiver clock need to be the same source.…
Part Number: ADC12DJ5200RF Hi team,
Does TI provide an API for the ADC12DJ5200?
For example, ADI provides an API for the AD9164.
https://www.analog.com/jp/resources/evaluation-hardware-and-software/software/ad916x-api.html
Our customer has requested…
Part Number: ADC12DJ5200RF Tool/software: Dear TI Support Team,
I am currently using the ADC12DJ5200RF and would like to ask about foreground calibration in relation to JMODE switching.
After performing a foreground calibration for a certain JMODE…
Part Number: ADC12DJ5200RF Our problem is about SFDR “signal free dynamic range” we have a test tone at 350MHz and then we get a 2 nd tone only 49-50 dB down.
I have done the measurement on only the analog part and that was not making this spure
…
Part Number: ADC12DJ5200RF Tool/software: To TI Support Team,
I have a question regarding the decimation filters of the ADC12DJ5200RF.
[Question] While reviewing the documentation, I noticed that the supported decimation factors are 4, 8, 16, and…
Part Number: ADC12DJ5200RF Tool/software: I want to connect two different FPGAs to the two channels of ADC12DJ5200RF. Is this approach feasible? How should the circuit be designed for the clock and synchronization?
Part Number: ADC12DJ5200RF Hi team,
My custoemr would like to use the ADC12DJ5200RF under the following conditinos, but he is having trouble linking it to the FPGA(KintexUltrascale+ XCKU11P, JESD IP: JESD204PHY+JESD204C).
Not using the SYNC pin…
Part Number: ADC12DJ5200RF Tool/software: Dear TI Support Team,
I have a few questions regarding the 'Device Functional Modes' section in the datasheet for the ADC12DJ5200RF.
[Question 1] According to the datasheet, using INA in single-channel mode…
