Part Number: ADC12DJ5200RF Other Parts Discussed in Thread: LMK04828 Hi :
I just want to make sure that what is exactly frequency and SYSREF to ADC12DJ5200 ? LIKE the picture below :
I set on-board Fs :2000Msps . mode : JMOD31 .
Is the JESD204 lane rate…
Part Number: ADC12DJ5200RF Hi team,
Our application demands the use of ADC as 12-Bit, Dual Channel, DDC Bypass, 16 Lanes.
So either JMODE 3 or 41 has to be used according to table 7.23, page number 95-96 in TI datasheet for ADC12DJ5200RF part.
JESD packet…
Part Number: ADC12DJ5200RF
I have
We are using x3 ADC12DJ5200 ADC ICs in my design, We have Phase matching requirement among the 3 ADCs. Below listed are the considered and implemented.
All x3 ADC sysref signals and x3 FPGA Sysref Signals are length…
Hello Xiaxin,
Can you check that your LMFS on your FPGA matches what is programmed to the ADC when you set the JMODE you can use link to check the LMFS for the JMODE you are using it is table 7-23 on page 95
www.ti.com/.../adc12dj5200rf.pdf
Best,
Eric…
Hi KLN,
A 3.3V bias rail will work for the TPS7A52. The TPS7A57 will want closer to 5V to meet both rails.
I will send you a friend request and you can directly contact me to review your LDO schematic then. If you need feedback on the ADC or other circuitry…
Part Number: ADC12DJ5200RF Other Parts Discussed in Thread: LMX1204 , , LMX2594
Hi,
In my design, am using TI Parts LMX1204, LMX2594 CLK Synthesizer, and ADC12DJ5200RF.
Below is the power tree diagram that am planning to use in my design.
Below is…
Part Number: ADC12DJ5200RF Other Parts Discussed in Thread: TPS7A83A Hi,
In my design, I have 3 ADCs ADC12DJ5200 devices. Please refer the below attached image for power scheme for all the ADCs. I want to confirm that the Power scheme is proper or not,…
Part Number: ADC12DJ5200RF
Hello Neeraj Gill Rob Reeder
request you to help us.
We are attempting to connect the Xilinx Zynq Ultrascale Board to the TRF1208-ADC12DJ5200RFEVM.
The following configuration has been made
1. To use External Reference clock…
Part Number: ADC12DJ5200RF
Hi All,
I am using the AD12DJ5200 in my custom board. For this I am using JESD 204 PHY as well as JESD204 Link Layer.
I want to know, how to make samples out of it.
Configuration:
JMOED3
Lanes per Link(L) = 8
Octets per frame…