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  • ADC12DJ5200RF: ddc

    Part Number: ADC12DJ5200RF Tool/software: Hello, I'm facing a problem about the ddc of adc12dj5200: after decoding the ADC's IQ data, I plotted the constellation diagram of I+jQ and noticed that it is sometimes not a perfect circle. Could this indicate…

  • ADC12DJ5200RF: ADC Theory of Operation from ADC12DJ5200RF Datasheet

    TI Thinks Resolved
    Part Number: ADC12DJ5200RF Tool/software: I have a question about ADC Theory of Operation from page61 of ADC12DJ5200RF Datasheet . The figure upper is from ADC12DJ5200RF datasheet(P61, 7.3.3.1).With about the VIN ,I have a question about it. I already…
    • Answered

  • ADC12DJ5200RF: Environmental (Humidity, Shock, Vibration, Altitude) Qualification

    Resolved
    Part Number: ADC12DJ5200RF Tool/software: Hello TI, I'm interested in the TI ADC12DJ5200RF and would like to know what environmental qualifications the device has out-of-the-box. My application intends to place this component into a ruggedized enclosure;…
    • Resolved

  • ADC12DJ5200RF: Sensitivity issue of receiving signals

    TI Thinks Resolved
    Part Number: ADC12DJ5200RF Tool/software: Hi Teams, 1. Use chip: ADC12DJ5200RF 2. Configuration mode: Dual channel 5GSPS 3. 204 interface configuration: Use JESD204B 8B/10B, JMODE3 4. Analog signal input: 5G/2.5G/1.25G/0.625G/0.3125Gbps, 5 levels in…

  • ADC12DJ5200RF: Background calibration support need

    Part Number: ADC12DJ5200RF Tool/software: Hi expert, Could you help to provide the guideline of background calibration (About ADC offset), especially for how to configure register? Thanks. Best Regards, Ryker
    • Answered

  • ADC12DJ5200RF: Proper CLK and SYSREF Frequencies

    Resolved
    Part Number: ADC12DJ5200RF Other Parts Discussed in Thread: LMK04832 , LMX2594 Tool/software: Hello TI Team, I'm currently investigating the necessary CLK and sysref frequencies for our slated ADC12DJ5200RF JESD204C implementation. I would like some…
    • Resolved

  • ADC12DJ5200RF: ddc

    Part Number: ADC12DJ5200RF Tool/software: Hi Team, I am using the adc12dj5200's ddc mode，the adc's clock is 5.2GHz.I use jmode16 to reduce the sampling rate to 650MSPS.In FPGA,The jesd204b's configuration as shown in the following figure.And the jesd204b…
    • Answered

  • ADC12DJ5200RF: JESD204 LINK from ADC12DJ5200RF Datasheet

    Resolved
    Part Number: ADC12DJ5200RF I have two questions about ADC12DJ5200RF Datasheet Datasheet URL: https://www.ti.com/lit/ds/symlink/adc12dj5200rf.pdf?ts=1716424043191&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FADC12DJ5200RF Q1. The ADC side…
    • Resolved

  • ADC12DJ5200RF: Phase Calibration issue

    TI Thinks Resolved
    Part Number: ADC12DJ5200RF Tool/software: Hi expert, My customer used two ADC12DJ5200 for phase calibration. Keep the first ADC12DJ5200 phase unchanged (32000 in phase control word). Then adjust the control word of the second ADC12DJ5200 and move toward…

  • ADC12DJ5200RF: JESD204C AND SERIALIZER LATENCY from ADC12DJ5200RF Datasheet

    TI Thinks Resolved
    Part Number: ADC12DJ5200RF Tool/software: The figure upper is from ADC12DJ5200RF datasheet(P30, 6.10).With about the tTx,in my opinion the non-deterministic delays(b) is the delay from TxLMFC to JESD204 serail output.And the deterministic delays(a…

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