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  • ADC12J1600: FIR filter details

    Resolved
    Part Number: ADC12J1600 Hi In the data sheet 7.3.6.3 it is stated that the output of the FIR filters are 15-bit complex. Is that the output of the final FIR filter or is that the output of each individual filter? How many bits are used between the filters…
    • Resolved

  • ADC12J1600: ADC12J1600: JESD204B data format and data mapping

    TI Thinks Resolved
    Part Number: ADC12J1600 Hi, I'm using ADC12J1600 to sample the data processed by KC705. I have some questions about the output data format of ADC12J1600. Since I'm setting the ADC to "decimation by 4" mode, I've learned about the data format of the DDC…

  • RE: ADC12J1600: ADC12J1600 to TSW14J10 Timed Out Error on HSDC Pro

    Hi, Jim, So, I'm wondering what's the right way to calculate NCO frequency? As we discussed before, we want to use ADC12J1600 decimated by 4 to sample a chirp signal. Best, Haotian.

  • RE: ADC12J1600: JESD204B captured data

    Haotian, Follow the instructions of the attached document to test the ADC in ramp test pattern mode. I did this with a KC705 and an ADC12J4000EVM. The ADC12J1600 instructions will be the same. Regards, Jim ADC12J1600_DEC_4_KC705_test_pattern_mode.pp…
    • Answered

  • ADC12J1600: Incorrect captured data by JESD204B core

    Resolved
    Part Number: ADC12J1600 Hi all, I'm trying to develop an algorithm on FPGA to process the sampled data by the ADC. We're using TI's ADC12J1600 and Xilinx's KC705, also TI's TSW14J10 for connecting the two boards. Here's the configuration…
    • Resolved
    • Answered

  • ADC12J1600: ADC12J1600 to KC705 FPGA: Verilog code

    Resolved
    Part Number: ADC12J1600 Hello again, Thank you for helping me resolve the functionality issue with ADC. It works just fine now. The next part of the project is to read the ADC data and apply our algorithm on it. The HSDC pro helps read and plot the data…
    • Resolved
    • Answered

  • RE: ADC12J1600: ADC12J1600 to TSW1400 to HSDC pro

    Resolved
    Hello Jim, Thank you for the explanation. I got it now. I need 1000Msps data rate at the output. Since I can't decimate by 1.6 by sampling at 1600Msps, I think I need to use 1000Msps sampling and bypass mode in ADC12J1600. So, am I right in saying ADC12J4000_DEC_4…

  • ADC12J1600EVM: ADc12J1600 REV. E3 schematics

    TI Thinks Resolved
    Part Number: ADC12J1600EVM Hello, Could anyone provide a link to the EVM schematic REV. E3 and GUI software for this EVM? Best regards, Dmitri
    • Answered

  • ADC12J1600: Fundamental tone attenuation

    Resolved
    Part Number: ADC12J1600 Hello, I set up ADC12J1600 using HSDC pro as per this thread: https://e2e.ti.com/support/data-converters/f/73/t/731953 Initially, I tried a 2MHz single ended tone with 600Mvpp swing and got severe attenuation in the FFT plot …
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    • Answered

  • ADC12J1600: Deterministic latency between startups.

    Resolved
    Part Number: ADC12J1600 I am trying to make the ADC12J1600 work with deterministic latency between startups. A pulsed sysref with the frequency of 12.5 MHz (1/128 of the device clock) is used. That frequency is a sub harmonic of the LMFC. I have also…
    • Resolved

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