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Showing 13 results View by: Thread Post Sort by
  • RE: ADC12J2700 -- can support variable type clock as devclk+/-

    Jim Brinkhurst1
    Jim Brinkhurst1
    Hi David I don't know enough about your application to know whether normalizing or resampling the ADC output data will provide what you need. Running the ADC at a fixed clock frequency will definitely make the ADC performance more consistent, and will…
    • over 9 years ago
    • Data converters
    • Data converters forum
  • Answered
  • RE: Problem with SYSREF detection during Multiple ADC Synchronization

    Jim Brinkhurst1
    Jim Brinkhurst1
    Resolved
    Hi Layne I presume the value you read back from register 0x31h is always 0xC7h, indicating that both the SysRefDet and Dirty Capture bits are set. I did see an issue (perhaps unrelated) with your setting of Register 0x201h. K=3 is not a legal setting…
    • over 10 years ago
    • Data converters
    • Data converters forum
  • Answered
  • RE: TSW14J56 EVM

    Junzhe Zheng
    Junzhe Zheng
    Resolved
    Hi Jim, Thanks a lot for your firmware above. I have bought a TSW14J56EVM and a ADC12J2700EVM for my study. But for some reasons, I can only get them after several weeks, so I want to do some simulations about your firmware.But there are some problems…
    • over 9 years ago
    • Data converters
    • Data converters forum
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