Part Number: ADC14155 Hello,
We are doing an analysis of or board assembly process to ensure we don't have parts dropping on the bottom side while the top goes through reflow. Is there a typical mass documented for the ADC14155 we can use to help perform…
Part Number: ADC14155 Good morning,
we are about to insert an ADC14155 into our design. It shall be interfacing with a FPGA, in charge of piloting it and retrieving the converted data. Is a HDL model available for this part for behavioural simulation…
Other Parts Discussed in Thread: ADC14155 , ADC14155QML-SP Dear Sir/Madam,
I would like to find out the different between the ADC14155 and ADC14155-SP.
1) Are both from the same die/family where the qualification is based on the packaging. For ADC14155 has…
I am using the space qualified part. I have two layout questions.
The datasheet says "the center die attach pad of the device should be connected to ground with low inductive path." Does this pad need to be soldered for best performance?
Also…
Hi
the question is whether the adc14155qml needs a differential clock or whether it can be signal ended and the the clk- grounded. Does Clk- need to be terminated with 50 ohms? My clock currently is 128 MHz, SE, Pin ~+15 dBm.
Other Parts Discussed in Thread: ADC14155 Please advise if the ADC14155 clock inputs are compatible with the LVPECL standard when in differential mode (CLK_SEL/DF = VA). The equivalent circuit on page 4 and the digital characteristics on page 8 of datasheet…
Part Number: ADC14155QML-SP Other Parts Discussed in Thread: ADC14155 Hello,
I am looking to understand if there are any power sequencing requirements on the ADC14155. Particularly, will there be a problem if the part sees a VD of 3.3V and a VA of 0V…
The data sheet provides typical timing of CLK to DAT = 2.0 ns. I must do a worst case analysis and need the best case and worst case timing of CLK to DATA and CLK to DRDY. Is this data available? If not can it be bounded?
