Part Number: ADC14155QML-SP On page 7 of the ADC14155QML-SP spec below, footnotes (2) and (5) indicate that the device will not be damaged if the input voltage exceeds the supply voltage as long as the input current is kept under 5mA. Just to confirm…
Part Number: ADC14155QML-SP Tool/software: Hi all,
I wish to use the ADC14155QML-SP by feeding it a differential output for the differential input from an instrument amplifier.
However, the typical application of the datasheet uses a transformer.…
Part Number: ADC14155QML-SP Other Parts Discussed in Thread: ADC14155
Hi,
I am using the ADC14155 in an application where it may receive an input signal while the ADC is off. Per the datasheet (see below) page 7, footnote 2 and 5, it appears that…
Part Number: ADC14155QML-SP Hello,
Looking through the datasheet I see that the logical "1" and "0" voltages are listed in the single-ended clock case. Are there well defined logical limits for when we use a differentail clock?
For reference, in…
Part Number: ADC14155QML-SP Tool/software: Hi everyone,
I have a question regarding the ADC14155QML-SP: The datasheet lists the analog input voltage as 0 to 2.6 volts
However, the full scale differential input voltage is also mentioned to be 2*Vref…
Part Number: ADC14155QML-SP Tool/software: I'm currently creating a footprint for this ADC in altium, but I noticed that the datasheet ( ADC14155QML-SP ) does not appear to mention total lead length anywhere.
Here's a screenshot of the package outline…
Part Number: ADC14155QML-SP Tool/software: Hi,
If the VA and VD (3.3V) suddenly lost power (0V) while VDR (1.8V) is still on, would this cause any stress to this ADC or latency failure? We are currently using this part for an IRAD, so I would like to…
Part Number: ADC14155QML-SP The part requires three voltages: Va (3.3 V), Vd (3.3 V), and Vdr (1.8 V). The datasheet indicates that Va and Vd shouldn’t be greater than 100 mV apart, so that implies they should be supplied by the same voltage regulator…
Part Number: ADC14155QML-SP Hi folks,
Quick question regarding the ADC14155QML-SP. When the device is powered down (PD held high), are all the data outputs (D0-D13, DRDY, OVR) tri-stated?
Thanks,
AH