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  • ADC168M102R-SEP: What is recommended termination for CS', CLOCK, BUSY, SDI, RD, SDOA, SDOB, CONVST?

    TI Thinks Resolved
    Part Number: ADC168M102R-SEP We are running the clock at 40 MHz. What is the recommended termination for the following pins: CLOCK CS' BUSY SDI RD SDOA SDOB CONVST
    • Answered

  • ADC168M102R-SEP: What is the impact of tying CS# to ground?

    Resolved
    Part Number: ADC168M102R-SEP Tool/software: In the datasheet, in the Typical Application schematic, CS# is tied to ground. We are trying to determine if we should do the same thing in our design. What are some reasons you would NOT want to tie CS# to…
    • Resolved
    • Answered

  • ADC168M102R-SEP: What is the required input current for the VREF inputs?

    Resolved
    Part Number: ADC168M102R-SEP Tool/software: I was looking in the datasheet for how much current the REFIO inputs need, and it looks like the datasheet is missing a unit: I was hoping use just an intersil regulator to provide the 2.5V reference, but…
    • Resolved

  • ADC168M102REVM-PDK: Unable to sample 8 channels

    TI Thinks Resolved
    Part Number: ADC168M102REVM-PDK Other Parts Discussed in Thread: ADC168M102R-SEP Tool/software: I am working with the evaluation module for the ADC168M102R-SEP. I intend to use it with full clock mode and pseudo-differential mode. I am unable to get analysis…

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