Part Number: ADC32J24 HI All,
I'm hoping to reach Jim Seton, who I've seen quite active on the highspeed forum. He gave a 3 part training seminar on the JESD204B;
https://training.ti.com/jesd204btraining
His slides are far better than any other…
Part Number: ADC32J25 Other Parts Discussed in Thread: LMK04828 , , ADC32J24 Hello,
Now we have the board, and the board has been verified including the clock generation with LMK04828 and FPGA
We are now trying to get the JESD204B working between ADC32J25…
Other Parts Discussed in Thread: ADC32J24 Dear Team,
On the ADC32J24 datasheet (p.6) under section 7.5 - DC Accuracy there is a definition of offset error.
Is this the channel-to-channel offset error or is it the total offset error ?
What is the maximum…
Hi Dan,
My apologies, I was referring to the ADC3223 (which is the LVDS variant) whereas I will now refer to the ADC32J23 (JESD).
Yes, the use of SYSREF with this device in subclass 1 conforms with JESD204B standards. Similar to the LVDS device, the SYSREF…