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Showing 31 results View by: Thread Post Sort by
  • ADC34J44: ADC34J44 input Impedance matching circuit

    Harry Ma
    Harry Ma
    TI Thinks Resolved
    Part Number: ADC34J44 Hi Team Can you help to review the the below circuit used for ADC34J44 input Impedance matching? Customer refer to our EVM's design.
    • over 3 years ago
    • Data converters
    • Data converters forum
  • ADC34J44: How much is 0dbfs of ADC34j44 equal to the analog input(dBm)?

    Zhen Zhang
    Zhen Zhang
    TI Thinks Resolved
    Part Number: ADC34J44 Hi, Team: When the input signal is greater than 0dbfs, the signal collected by FPGA becomes more spurious, like overflow. I want to ask what is the maximum input signal allowed by adc34J44.
    • over 3 years ago
    • Data converters
    • Data converters forum
  • ADC34J44: JESD204B clock configuration

    Harry Ma
    Harry Ma
    TI Thinks Resolved
    Part Number: ADC34J44 https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/747093/adc34j44-jesd204b-configuration-check?tisearch=e2e-sitesearch Hi Team What is the meaning of 'N' in this link post? the Divide?
    • over 3 years ago
    • Data converters
    • Data converters forum
  • Answered
  • ADC34J44: Schematic for ADC34J44

    Satyaharika Ananthagiri
    Satyaharika Ananthagiri
    Resolved
    Part Number: ADC34J44 Hi, We are planning to use this JESD interface daughter board with our FPGA. I want to know the FMC connector pinouts. Please send me the schematic asap. Regards, Harika.
    • Resolved
    • over 5 years ago
    • Data converters
    • Data converters forum
  • ADC34J44: Power Down Operation. Does SPI work?

    Steve Joures
    Steve Joures
    TI Thinks Resolved
    Part Number: ADC34J44 Other Parts Discussed in Thread: ADC32J44 If the PDN is pulled up from power up, is it possible to acess the device through the SPI interface, without first driving the PDN pin low? Whilst in power down what do the device outputs…
    • over 3 years ago
    • Data converters
    • Data converters forum
  • ADC34J44: How to transform ADC34JJ44 output from CML to LVDC

    Harry Ma
    Harry Ma
    TI Thinks Resolved
    Part Number: ADC34J44 Hi team As mentioned in Datasheet, Digital output level is CML, if the receiver is just supported LVDC ,if customer can change by impendence matching? How? Thanks!
    • over 3 years ago
    • Data converters
    • Data converters forum
  • Answered
  • ADC34J44: please recommend a DC driver circuit for ADC34J44

    hai xuan
    hai xuan
    Resolved
    Part Number: ADC34J44 Other Parts Discussed in Thread: THS4541 Dear all, I am thinking use ADC34J44 as in my project. My application needs a DC coupling. Is there any recommended diff driver & circuit for this adc, since the evm only has the transformer…
    • Resolved
    • over 7 years ago
    • Data converters
    • Data converters forum
  • RE: ADC34J44: https://e2e.ti.com/support/data-converters/f/73/t/507326?tisearch=e2e-sitesearch&keymatch=ADC34J44

    dBrock
    dBrock
    Hi Sanjay, Is the LVDS output from the FPGA a 1.8V signal? If not, I would suggest using a level translator in order to be in line with the datasheet. Best Regards, Dan
    • over 6 years ago
    • Data converters
    • Data converters forum
  • RE: ADC34J44: Does the output code rollover incase of overrange?

    dBrock
    dBrock
    Hi Sanjay, I have not seen the codes roll over before. Is this happening on all of the channels? Can you please explain this further? There is an over-range bit for each channel that will indicate an over-range event. Best Regards, Dan
    • over 5 years ago
    • Data converters
    • Data converters forum
  • RE: ADC34J44EVM: ADC34J44: SPI coomunication problems

    jim s
    jim s
    Lorant, Please try writing a 0x04 to address 0x15 and see if you notice the current dropping going to the EVM. This enables the global power down. Regards, Jim
    • over 5 years ago
    • Data converters
    • Data converters forum
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