Answered

• ADC3562: SCLK between Register Adress and Register Data

  

  Kei Kuwahara

  Resolved

  Part Number: ADC3562 Tool/software: Hello team, Customer wants to put pause to SCLK after last clock of Register Address bit, as shown on the diagram below. How long can it wait after falling edge of register address? Best Regards, Kei Kuwaha…

  • Resolved

  • over 1 year ago
  • Data converters
  • Data converters forum
Answered

• ADC3562: Input clock

  

  Kei Kuwahara

  Resolved

  Part Number: ADC3562 Hello team, I am wondering if I should use push-pull or open-drain clock signal to CLKP or CLKM pin. Which is more appropriate push-pull or open-drain? Best Regards, Kei Kuwahara

  • Resolved

  • over 2 years ago
  • Data converters
  • Data converters forum
Answered

• ADC3562: Regarding the timing when Sample N sampled by the sampling clock is output from DA0/1

  

  nobuyuki_oda

  Resolved

  Part Number: ADC3562 Tool/software: Hi I don't quite understand how to interpret the timing diagram in Figure 7-1 on page 26 of the data sheet. Starting from the falling edge of the sampling clock, data DA0/1 is output along with DCLK, and it is written…

  • Resolved

  • over 1 year ago
  • Data converters
  • Data converters forum
Answered

• ADC3562: CLKin termination (HCSL)

  

  Kei Kuwahara

  Resolved

  Part Number: ADC3562 Other Parts Discussed in Thread: LMK00334 Hello team, My customer would like to input HCSL clock signal to ADC3562 CLKIN. (AC-coupled) Do we need termination resistor at the CLKIN of ADC3562? Best Regards, Kei Kuwahara

  • Resolved

  • over 2 years ago
  • Data converters
  • Data converters forum
Answered

• ADC3562: Regarding AINM pin processing when using AD conversion with single-ended input

  

  nobuyuki_oda

  Resolved

  Part Number: ADC3562 Other Parts Discussed in Thread: THS4541 Tool/software: Hi. My name is Oda. I want to input a single-ended analog signal to AINP. Should I connect AINM directly to GND? Or should I use a differential filter and connect it to…

  • Resolved

  • over 1 year ago
  • Data converters
  • Data converters forum
Answered

• ADC3562: Can I use HCSL signal as clock input?

  

  Kei Kuwahara

  Resolved

  Part Number: ADC3562 Other Parts Discussed in Thread: LMK00334 , Hello team, Can I use HCSL signal as clock input (CLKP, CLKM)? Best Regards, Kei Kuwahara

  • Resolved

  • over 2 years ago
  • Data converters
  • Data converters forum
Answered

• ADC3562: SDIO pin open drain or push pull?

  

  Kei Kuwahara

  Resolved

  Part Number: ADC3562 Hello team, Is SDIO pin open drain or push pull? Best Regards, Kei Kuwahara

  • Resolved

  • over 2 years ago
  • Data converters
  • Data converters forum

• ADC3562: What kinad of Architecture?

  

  Kato Yuya

  TI Thinks Resolved

  Part Number: ADC3562 Hi Team Could you teach me about ADS3562. I Looking Datasheet. But i can't serch of this ADC of architecture. SAR? Pipeline? If possible,please provide me with Document about that. thanx

  • over 3 years ago
  • Data converters
  • Data converters forum

• ADC3562: Reference design with LVDS output with cable

  

  Kei Kuwahara

  TI Thinks Resolved

  Part Number: ADC3562 Other Parts Discussed in Thread: ADC3662EVM Hello team, My customer is considering to use ADC3562 with LVDS output to FPGA via FFC (Flexible Flat Cable). Customer is going to use ADC3562 with 10MSPS, so datarate would be 160MHz…

  • over 2 years ago
  • Data converters
  • Data converters forum

• ADC3562: Solution recommendation on ANC system

  

  Kai Lai

  TI Thinks Resolved

  Part Number: ADC3562 Hi Team, My customer now is target to design a ANC (Active Noise Cancellation) system, and they are searching our ADC / DAC solution, need expert to provide the recommendation and technical topic reply here. Thanks for your support…

  • over 3 years ago
  • Data converters
  • Data converters forum

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