Search tips
Showing 27 results View by: Thread Post Sort by

  • ADC3662: CLKP, CLKM driver

    TI Thinks Resolved
    Part Number: ADC3662 Tool/software: Hi, I want to connect ADC3662 to FPGA but I am struggling to find how can I drive sampling clock inputs CLKP, CLKM. What logic levels and/or driver I must use to have best performance? I read the datasheet but there…
    • Answered

  • ADC3662: Power up

    Resolved
    Part Number: ADC3662 Tool/software: Hi, the datasheet says that the REFBUF pin should be have a delay to the AVDD by 2ms: In the ADC3662EVM schematic is the REFBUF pin connected to AVDD directly via a jumper: So in my opinion there is no delay included…
    • Resolved
    • Answered

  • ADC3662: Hardware Reset

    Resolved
    Part Number: ADC3662 Tool/software: Hi, is there always a hardware reset needed after power-up phase? If yes, would it also be possible to keep the RESET pin at high from beginning, so: Thanks for help!
    • Resolved
    • Answered

  • ADC3662: ADC input protection

    Resolved
    Part Number: ADC3662 Other Parts Discussed in Thread: , THS4541 Tool/software: Hi, I'm using the ADC3662 with the THS4541 as FDA like at ADC3662EVM. In the datasheet of the ADC3662 it's mentioned that protection diodes may be needed to protect the…
    • Resolved
    • Answered

  • ADC3662: DDC use with output sampling rate higher than image frequency.

    Resolved
    Part Number: ADC3662 Dear TI. We are testing a board with the ADC3662 on it configured to use the internal DDC. The system works with a fixed sampling frequency, but the carrier frequency can be different. When the low frequency carrier is used, the resulting…
    • Resolved
    • Answered

  • ADC3662: INPUT RANGE FOR ADC3662

    Resolved
    Part Number: ADC3662 Other Parts Discussed in Thread: THS4541 In adc3662`s datasheet, chapter 6.6 say that input full scale is 3.2 Vpp and input commom model voltage is 0.95V. So the input range is from (0.95-1.6)V to (0.95+1.6)V. Is it right? However…
    • Resolved
    • Answered

  • ADC3662: Overflow behaviour

    Resolved
    Part Number: ADC3662 Dear all, We are designing a board with the ADC3662 configured to use the internal DDC feature with complex decimation. We are wondering what will happen in case of an overflow? We do not see any dedicated pin or status bit to get this…
    • Resolved
    • Answered

  • ADC3662: Clock jitter on DCLKIN

    Resolved
    Part Number: ADC3662 Dear all, We are designing a board with the ADC3662 configured to use the internal DDC feature with complex decimation. To simplify the design, we are considering to generate the DCLKIN clock with the FPGA internal PLL. This clock is…
    • Resolved

  • ADC3662: Digital Input Protection

    TI Thinks Resolved
    Part Number: ADC3662 What is the input circuitry for the RESET, SCLK, SEN, and SDIO signals? Is there diode protection?

  • ADC3662: Differential Signal Level for CLKP and CLKM

    TI Thinks Resolved
    Part Number: ADC3662 Hi, Good Day. We need to know the Differential Signal Level for CLKP and CLKM. Datasheet doesn't mention what is common mode required on the differential clock input. We need to know the levels of all the differential signals…

Didn't find what you are looking for? Post a new question.