Part Number: ADC3664 Hi, In my project, I am using 3 ADC3664. I have a doubt regarding the usage of PDN/SYNC pin. Here I am implement a design as per the data got from Datasheet. Can you please check it with for synchronization of all 3 ADCs. Thanks
Part Number: ADC3664 Hi Team,
Please help answer the following questions.
1) is the SNR calculated by analyzing FFT data after the A/D conversion?
2) the signal input to A/D is the signal from the measuring instrument( e.g. Signal Analyzer or Signal Generator…
Part Number: ADC3664EVM Other Parts Discussed in Thread: ADC3664 , Hi,
1. Regarding ADC3664, the absolute maximum rating of the AINP/M and BINP/M pins is 2.1V. It also states that the typical input common voltage is 0.95V and the input full-scale differential…
Part Number: ADC3664 Designing the ADC3664 with Ultrascale FPGA. Doubt regarding following signals, need 100ohm termination in FPGA side or not? DCLKP : Positive differential serial LVDS bit clock output. DCLKM : Negative differential serial LVDS bit clock…
Part Number: ADC3664 Hi Team,
We're selecting one 100MSPS ADC, the preferred part is AD3664. but in d/s, it is said this ADC architecture is SAR NOT pipeline, may I know why SAR ADC can support such high sample rate? my concern is that if this has crosstalk…
Part Number: ADC3664 Hi Team,
We are looking for the ADC3664 Input Model for TINA simulation and we don't see it available on the TI website.
Is the model available ?
Best regards
Part Number: ADC3664 Hi Team,
Can you please check and advise with following request?
"
On page 7 of the product's data sheet, 0.5 MHz is specified as the minimum value of "Input clock frequency" if "External reference" is used;…
Part Number: ADC3664 Other Parts Discussed in Thread: THS4551 , , THS4541 This is a process in which the infrared signal passing through the photodiode and external noise must be input to the FPGA through the ADC.
In the case of a high-performance ADC…
Part Number: ADC3664 It seems like the default output format is 14-bits in 2s complement and the DDC is bypassed. I can't quite figure out the default configuration for the number of lanes used. I'm trying to understand if my desired application can work…
Part Number: ADC3664 Hi team, Could you kindly tell me why the sampling rate is faster with the SAR(ADC3664)? I am very interested in this device. Is there anything other than power consumption that SAR better than pipelines? Sincerely. Kengo.