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Showing 28 results View by: Thread Post Sort by
  • ADC3683: Can ADC3683 work with 100kHz input signals?

    Marsh Cai
    Marsh Cai
    TI Thinks Resolved
    Part Number: ADC3683 Hi teams, My customer is using ADC3683 on their products. When they input high frequency signals (sine wave, 600mVpp@1Mhz, 10Mhz,), ADC3683 can work well, with THD about -80dB. However, when input an low frequency signal (100kHz,…
    • 7 months ago
    • Data converters
    • Data converters forum
  • ADC3683: ADC3683 deserializer source code to interface with Xilinx FPGA

    emil asriyan
    emil asriyan
    TI Thinks Resolved
    Part Number: ADC3683 Hello, Our design team is evaluating ADC3683 using DC134 eval board for our future product line. I was looking for an 18-bit ADC deserializer source code to interface with Xilinx Ultrascale+ I am a bit confused about the need for…
    • 8 months ago
    • Data converters
    • Data converters forum
  • ADC3683: Glitch and input of ADC

    Follin Ju
    Follin Ju
    TI Thinks Resolved
    Part Number: ADC3683 Other Parts Discussed in Thread: THS4551 , , , THS4541 Hi, I used THS4551 to drive ADC3683 and found large glitch (200mV peak) on the nodes V_P and V_N. The waveform is scope calculation result V_P - V_N. The scope bandwidth is 200MHz…
    • 5 months ago
    • Data converters
    • Data converters forum
  • Answered
  • ADC3683: FCLK DIV Register value

    Yuto Kitamura
    Yuto Kitamura
    Resolved
    Part Number: ADC3683 Hi team, In Fig.8-53 and Table 8-22 in the D/S said that initial value of Register"0x19" after the reset is "0x00." but my customer got "0x10"(FCLK DIV=1) as actual measurement. It is possible to write…
    • Resolved
    • 6 months ago
    • Data converters
    • Data converters forum
  • RE: ADC3683: Sampling clock (CLKP/M) differential levels (VID)

    Amy Weatherby
    Amy Weatherby
    Hi Claude, What you describe above should not be an issue. Regards, Amy
    • 8 months ago
    • Data converters
    • Data converters forum
  • Answered
  • ADC3683: Programming via SPI (Serial Programming Interface)

    felix_123
    felix_123
    Resolved
    Part Number: ADC3683 Other Parts Discussed in Thread: TDA4VM Hi TI, the ADC3683 datasheet mentions in chapter 8.5 Programming, that "The device is primarily configured and controlled using the serial programming interface (SPI)". When looking up the specification…
    • Resolved
    • over 1 year ago
    • Data converters
    • Data converters forum
  • ADC3683: Possibility to share DCLK with multiple convertes

    Rob van der Meer
    Rob van der Meer
    TI Thinks Resolved
    Part Number: ADC3683 Other Parts Discussed in Thread: TSW1400EVM , LMK04228 Hi, We would like some expert advice on the following: we are working on a design where we would connect 15 x ADC3693 to an Intel FPGA (Arria 10). At the FPGA-side the LVDS DDR…
    • over 1 year ago
    • Data converters
    • Data converters forum
  • Answered
  • ADC3683: Bit 17 high with test pattern 0 (or any other)

    Rob van der Meer
    Rob van der Meer
    Resolved
    Part Number: ADC3683 Hi, Something small I do not fully comprehend: when I enter 'Custom pattern' and pattern value 0, I see in the HDSC application that bit 17 is high -> 131072. When 131072 is entered as a test pattern the output is truly 0…
    • Resolved
    • over 1 year ago
    • Data converters
    • Data converters forum
  • ADC3683: Operations without frequency locked DCLKIN

    Robert Braunschweiger
    Robert Braunschweiger
    TI Thinks Resolved
    Part Number: ADC3683 Other Parts Discussed in Thread: CDCE6214 Hi, the data sheet of the adc3683 states that the dclkin clock needs to be frequency locked to the sample clock. I have an application where I don't have equidistant sampling points and hence…
    • over 1 year ago
    • Data converters
    • Data converters forum
  • ADC3683: differential input impedance for simulating AAF and Glitch Filter

    Pedantus
    Pedantus
    TI Thinks Resolved
    Part Number: ADC3683 I do not really understand the function / the effect of the recommended Glitch Filter between AAF and ADC. The description in the ADC data sheet is not detailed enough for me. The EVM uses different values for the Glitch Filter than…
    • over 1 year ago
    • Data converters
    • Data converters forum
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