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  • ADS127L11: Calculating maximum time to send conversion data

    Resolved
    Part Number: ADS127L11 Hi, In start/stop control mode, is there a formula to calculate the time between ~DRDY going low (indicating data ready) to the shift register being filled with the next bin of samples? If not, can you please tell me how I can roughly…
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    • Answered

  • ADS127L11: Negative voltage input without negative reference condition

    Resolved
    Part Number: ADS127L11 Hello, I would like you to confirm about below. * When user want to input -2.048V to 2.048V to ADC as single end signal without negative reference source , Is following configuration available ? AVDD1 = AVDD2 = 2.5V AVSS = -2.5V DGND…
    • Resolved

  • ADS127L11: DNL

    TI Thinks Resolved
    Part Number: ADS127L11 Hi team, May I ask why the DNL spec is not apply to the Delta sigma ADC? My customer would like to know whether there are other ways to estimate the value of the ADS127L11's DNL. Could you please help give some comments? Thanks…
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  • ADS127L11: Can someone please clarify data sheet

    Resolved
    Part Number: ADS127L11 Hi can you please someone please clarify the data sheet. On page 1 it says 1.067MSPS sample rate but on page 7 SNR is specified with an OSR of 64. Does this mean that to get the SNR specified with an OSR the throughput is only…
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  • ADS127L11: Control custom ADS127L11 board using PHI Controller

    TI Thinks Resolved
    Part Number: ADS127L11 Hello, I am looking at using the PHI Controller and GUI to control a custom board containing the ADS127L11. Is it compatible with 4-wire SPI mode or does it need to be connected to the RESET, START and DRDY pins? Regards, Joe
    • Answered

  • ADS127L11: Threshold voltage of Digital In

    Resolved
    Part Number: ADS127L11 Hi team, How much is the digital input threshold voltage? I can only see the data below in the datasheet. What will the logic become when input 0.3*IOVDD~0.7*IOVDD? Best regards, Yuto
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  • ADS127L11: RESET / SCLK timing for td(RSSC)

    TI Thinks Resolved
    Part Number: ADS127L11 Hi team, I got question about RESET / SCLK timing for td(RSSC). As shown in Figure 6-3 in D/S, do we need to keep SCLK "Low" while td(RSSC) timing? Or td(RSSC) is just a time that the communication has not started, thus…

  • RE: ADS127L11 + INA128 Schematic Review

    Hello Lajos, I checked your schematic and have a few comments. 1. Pinout and connections around ADS127L11 are correct and should work with no issues. 2. The reference circuit should work well as long as the reference pre-charge buffer is enabled in each…
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  • ADS127L11: External Clock votlage levels

    Resolved
    Part Number: ADS127L11 Other Parts Discussed in Thread: TXU0101 Let's say I'm running the ADS127L11 with AVDD and IOVDD at +5V and AVSS at 0V and I want to provide CLK with the output from an external oscillator. What are the acceptable voltage…
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  • ADS127L11: SPI Operation about CLK/SCLK

    Resolved
    Part Number: ADS127L11 Hi team, I got a question about SPI Operation in D/S 9.1.1. It says that: 1. Use an SCLK that is phase coherent to CLK; that is, ratios of 2:1, 1:1, 1:2, 1:4, and so on. 2. Minimize phase skew between SCLK and CLK (< 5 ns). …
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