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Part Number: ADS1282-SP Dear All,
it's stated that "Single Event Latchup (SEL) Immune to LET = 60 MeV-cm 2 /mg at 85°C", but in the Report SBAA222 I cannot find any evidence about the relevant test data with this LET.
The max LET in Table8…
Part Number: ADS1282-SP Wondering what CoTS equivalents there are for the ADS1282-SP?
If there are any available, I was wondering what prices and lead-times are for them?
I noticed that the datasheet mentions that there are engineering evaluation samples…
Part Number: ADS1282-SP
dear All,
it is not clear what disruptions are analyzed in the SET section of SBAA222 (SEFI, SET, register SEU’s), and what is not considered even if relevant, for which we don’t have data.
Table 5 is relevant to? …
Hi Cole,
I can't change that bit because the FPGA uses the ADC in CHOP mode only to improve self 1/f noise rejection performance.
Every change that the FPGA commands to the ADC is hard-coded and as you know the FPGA I'm using is OTP.
I was guessing…
Hi Ian,
The reference impedance can approximate the amount of bias current you'd expect from the ref pins. See below from the datasheet where the reference impedance is 85kohm typical. This is approximately 10uA of current, or at least similar to what…
Part Number: ADS1282-SP Other Parts Discussed in Thread: ADS1282 Dear all,
I have some question about Power-ON Sequence.
ADS1282-SP has 3 power supplies: AVDD, AVSS and DVDD.
Datasheet says that there is no specific order applicable to device power supplies;…
Part Number: ADS1282-SP Other Parts Discussed in Thread: ADS1282 Dear all,
I have some question about Power-ON Reset and HW reset.
1. Datasheet reports that at power-up, ADC removes internal reset after Trst = 2^16/Fclock, then first data is output after…
Part Number: ADS1282-SP Other Parts Discussed in Thread: ADS1282 Using the ADS1282 Delta Sigma ADC. It is set up using a unipolar supply which the data sheet says is valid. The supply is 5.0 volts (AVDD), AVSS is 0 volts. The VREFP is 5 volts, the VREFN…
Part Number: ADS1282-SP Other Parts Discussed in Thread: ADS1282 Hi,
I am going to use the AD1282-SP ADC and I need to get a better understanding of its Calibration option.
AD1282-SP's datasheet, in §8.5.2 Calibration Commands, states: The calibration…
Part Number: ADS1282-SP The datasheet does not specify timing parameters for DRDY relative to either SCLK or CLK. Is DRDY synchronous to either clock? What is the min/max propagation delay for DRDY relative to (which) clock?
I'm wondering how to safely…