Part Number: ADS1672 Other Parts Discussed in Thread: SN74LV1T34 Tool/software: Hi TI
I'm using SCLK_SEL at 1, LL_CONFIG at 1, and FPATH at 0.
The FAE told me to control the START terminal to use a sampling frequency of 256kHz.
I'm considering inputting…
Part Number: ADS1672 Other Parts Discussed in Thread: ADS127L21 Tool/software: Hello,
I hope this message finds you well. I’m writing to inquire about the ADS1672 converter. I noticed that the evaluation board associated with this model has been marked…
Part Number: ADS1672 Other Parts Discussed in Thread: SN74LVC244A , SN74LV1T32
Hi team,
Customer will use SN74LVC244A between ADS1672 and FPGA as level translator.
ADS1672 require the raising / falling time less than 2ns and do you think SN74LVC244A…
Part Number: ADS1675 Other Parts Discussed in Thread: ADS1672
Hi,
I was comparing the ADS1672 to the ADS1675 and I noticed that the 72 has a DVdd range of 2.7 3.0 3.3 while the 75 has a DVdd range of 2.85 3.0 3.15. The max operating ranges of the…
Part Number: ADS1672 Other Parts Discussed in Thread: REF6030 , THS4551 , ADS9110 Hi:
The differences between the calculated ADC counts and the read (actual) ADC counts are increasing as the differences between AINP and AINN input are increasing as…
Part Number: ADS1672 Hi team,
My customer is considering the power supply structure shown in below, however there is a concern to use the same 5V supply with external oscillator for ADS1672. Do you have any advice to avoid noise issue, otherwise does…
Part Number: ADS1672 Other Parts Discussed in Thread: OPA320 , OPA192 Dear Support,
I need driving the ADS1672 with a single-ended signal, 4Vpp from a low-noise voltage amplifier, while keeping the ADC specs.
The voltage amplifier has low output impedance…
Part Number: ADS1672 Hi team,
We got inquires from customer as following.
Duty cycle of CLK In case of multiple conversion, customer will configure ADS1672 CLK = 20MHz, FastResponse, LowLatency, DR=625ksps. According to the datasheet, the duty…
Part Number: ADS1672 Hi team,
Our customer would like to double check the period of START pulse.
In case of single-cycle settling configuration, the period of start pulse is more than tSETTLE. It doesn’t include the period of 24 bit data output…
Part Number: ADS1672 I'm using ADC ADS1672 to sample the data at 100 ksps, But i'm not able to figure it out at what input frequency (Fclk) it works at 100 ksps.
I'm working at wide bandwidth at fast response mode.
I've seen that two data rate pins…
