Part Number: ADS4129ADS4129 behave as expected by clipping data on input over-range accordingly to the side of event. It sticks to 1FFFh/2000h in case of top/bottom overload in two complement format. To my regret, I discovered that the expected clipping…
Part Number: ADS4129 Other Parts Discussed in Thread: ADS4128 , ADS4149 In our custom board we are using ads4129. the register configurations are x"41C0", x"3D80",x"4208", x"DF30", x"0303", x"4A01", x"2503", x"2500". the sampling clock is 24Mhz. we have…
Part Number: ADS4146 Other Parts Discussed in Thread: ADS4129 , Hello,
Can you please help me out if there is any reference designs available for ADS4146 or ADS4129 to successfully configure the ADC and received the Digital data in FPGA by using VHDL or…
Part Number: ADS4129 What happens if the input voltage value of ADS4129 is greater than the maximum allowed input value?Will it damage ADS4129?If there is no damage, what is the sampling value of ADS4129?Is its maximum allowed input value?
Part Number: ADS4129 I have a single-ended output op amp,and I want to sample the op amp's output via ADS4129,at the same time, the ADS4129 was output by LVDS mode。
I want to ask if ADS4129 can be used in this way,or ADS4129 can only be used with…
Part Number: ADS4129 Hi,
I can't detect any output clock. I'm using an lvpecl input. The P of this clock signal side can be seen on the follwing image (which follows the 1.6vpp differential):
-The output clock is just two DC values 0.9V and…
Part Number: ADS4129 Dear TI technical support team,
We have designed a DAQ board based on ADS4129 which works perfectly for over 2 years. However, the last batch we produced last month do not function properly. It turns out the Vcm pin of ADS4129 does…
Part Number: ADS4129 Other Parts Discussed in Thread: DAC5672 , THS3091 , ADS4149 Hi
I am generating 14-bit OFDM signal from Xilinx FPGA at 40MHz. Then I am feeding it to the DAC (DAC5672), which is getting amplified by TX Amplifier (THS3091). The amplifier…
Part Number: ADS4129 Hi,
I'm having trouble understanding the lvds interface.
In the datasheet:
http://www.ti.com/lit/ds/symlink/ads4129.pdf?HQS=TI-null-null-digikeymode-df-pf-null-wwe&ts=1589045800369
under DIGITAL OUTPUTS (LVDS INTERFACE: DA0P…