Part Number: ADS5296A
I am looking at the setup and hold times for the case of 10x serialization in data sheet dated October 2013 (SBAS631).
On the one hand, the table on page 7 shows Tsu = 0.2 and Th = 0.16. These are defined in the figure 3.
Does…
Part Number: ADS5296A Hello Team,
Good day.
My Customer who is working with a company designing a test socket for test QFN-64 pitch 0.5 would like to confirm some tolerance of the IC. It appears to them that the tolerance that appears in the datasheet…
Part Number: ADS5296A Hi,
The table of pin descriptions on page 14 describes RESET (BAR) as active high reset yet the name indicates active low (BAR).
Figures 4 & 5 continue this confusion.
Could someone please tell me the correct polarity.
…
Part Number: ADS5296A Other Parts Discussed in Thread: VCA2615 Hello TI.
Two questions:
Firstly :
I noticed that the EVM for this device uses back-back transformers at the input stage.
This idea is not mentioned in the data sheet.
Please tell…
Part Number: ADS5296A I come from a telecommunications background where we developed bit error rate testers using pseudorandom bit sequences. The diversity of the bit sequences are superb for finding problems with too many consecutive ones or zeros as…
Part Number: ADS5296A In interleaved mode, two adjacent LVDS output streams deliver simultaneously the values of two successive samples. According to Figure 82 of the data sheet "Interleaving Mode Latency Timing Diagram", the lower-numbered output stream…
Part Number: ADS5296A Hello Team,
Can I use a single-ended signal as input in the device ADS5296A? If ok, how should I do for INx_n?
Thanks in advance.
Regards,
Renan
Part Number: ADS5296A Other Parts Discussed in Thread: ADS5294 The data sheet gives almost no information about use of the PDN (power down) pin. Please specify:
1. Is the pin active-low or active-high? In which state should it be for normal operation…
Hi John,
Please find the relevant description below-
The PRBS generator in ADS52J96 can give 9-bit or 23-bit LFSR Pseudo random pattern on the channel outputs that are controlled by the register 0x25. To enable the PRBS pattern PRBS_TP_EN bit in the…
Part Number: ADS5296A Hi,
I want the ads5296a to be operated as an 4_channel 10 bit with interleaving mode.and I configured the register according to the address and data below.
Addr=0x00, Data=0x0001
Addr=0x00, Data=0x0000
Addr=0x07, Data=0x0001…
