Part Number: ADS5400
Tool/software:
Dear all,
I have built an evaluation board for the ADS5400 that has no need for the mezzanine card in between and solve some other issues I faced with the original evaluation board.
Would it be possible to promote…
Part Number: ADS5400-SP Other Parts Discussed in Thread: ADS5400 Tool/software: Does TI have an example design integrating the ADS5400 with the Xilinx High Speed SelectIO system?
Part Number: ADS5400 Tool/software: Dear TI Team, I have a question regarding the wire lengths inside the IC ( ADS5400IPZP) from the pins to the dice? Are the lengths matched? If not, could you please provide any information regarding the internal lengths…
Part Number: ADS5400 Other Parts Discussed in Thread: ADC12D1000 , ADC12SJ1600 Tool/software: I am looking for an ADC to use in a measuring instrument that measures semiconductor switching losses.
The required specs are as follows. I think the ADS5400…
Part Number: ADS5400-SP Hello,
We're interfacing the ADS5400-SP to a Kintex 7 FPGA. Is there example verilog code available, specifically for the LVDS interface? Whatever is available would be helpful, even if it is generic to the fpga device. Thanks…
Part Number: ADS5400 Hi,
Figure 1 of the datasheet states that " RESET can be a single pulse, low-to-high step or repetitive pulse input signal". I want to also make sure whether an evenly divided version of CLKIN signal fed into the RESET input is…
Part Number: ADS5400 Other Parts Discussed in Thread: LMK04208 Hi Expert,
My customer plan to use LMK04208 with ADS5400, are they suitable for use together?
LMK04208 clock out Vpp range = 0.5~0.9V
ADS5400 clock in Vpp range = 0.6~1.5V
Thanks…
Part Number: ADS5400 Hi team,
for the ADS5400, i read from the datasheet that the maximum clock sample rate is 1 GSPS.
Do you think it is possible to work with higher sampling frequencies, such as 1.5 GSPS?
If yes, do you have some measurements…
Part Number: ADS5400-SP Other Parts Discussed in Thread: ADS5400EVM Hi,
I am using ADS5400-SP in dual bus mode. In the PRBS output mode, should the outputs of data bus A and B always match? In our experiment, the phases of the PRBS7 sequence are not…
Part Number: ADS5400-SP I have a loosely diagnosed issue with one of these devices, after being put into low power mode via the SPI register and allowed to sit for >2 minutes my FPGA code does not capture the clock edges and fails to generate data. This…
