Part Number: ADS5474 Hi Team,
Just want to confirm - are there any sequencing requirements on the ADS5474 that we'd need to adhere to between the 5V (AVDD5) and 3.3V (AVDD3 & DVDD3) rails? I see that the datasheet calls out specific requirements to bring…
Part Number: ADS5474 Other Parts Discussed in Thread: TINA-TI Is there spec performance data for ADS5474 in the case of DC-input condition?
By the way, I think that ADS5474 can use 1kHz-square wave input (50% duty), is it correct?
Other Parts Discussed in Thread: DAC34H84 , ADS4249 , ADS5474 , TSW1400EVM Dear All
I have ordered ADS5474, ADS4249,DAC34H84.
I need reference code for above mentioned items. Kindly give me a link
and if some one have VHDL code for Xilinx FPGA then kindly…
Can you share the FPGA firmware for the TSW1405, I'm want to try some custom algorithms on the FPGA, I now that TI doesn't support custom firmware but it will be a good starting point to have the source code.
Other Parts Discussed in Thread: ADS5474 , ADS5402 , ADC12D500RF Hi,
I'm seeking for dual channels,12bits and over,400MSPS and over ADC with small latency like ADS5474. Would you provide the information ?
Other Parts Discussed in Thread: ADS5474ADS5474 on my board is clocked at 400MHz. When I analyzed the data from ADS5474 using FFT, I noticed that the noise floor is not flat. The noise floor is sloped down from DC to 200MHz. The noise floor at the DC…
Other Parts Discussed in Thread: ADS5474 , ADS5400 I notice that my ADS5474 output data has a DC offset about +5mV, which is about 37 codes above the zero output code. For a continuous sine wave input, the output data swings around output code 8229, not…
Other Parts Discussed in Thread: ADS5474 , ADS54RF63 , ADS5463 , ADS4129 , ADS4128 , ADS5402 , ADS54T04 Hello,
I am using ADS5474 for my system, but I am going to change a lower resolution (12bits) and low power consumption ADC.
Can somebody kindly give me a…
Other Parts Discussed in Thread: ADS5474 , LMK04816 Sir:
I need do a design with 4 ADS5474 to implement a interleaved ADCs, in which the sampling rate is 1.3G and each ADC works in 325M.
Now I have two clock schemes:
(1)One is used the dual PLL LMK04816…