I think it's unlikely you could get this to work. It appears that the sampling is constant based on the clock. You would need some logic to buffer the samples and allow them to be read in bursts similar to a DDR memory access. You would probably have…
Other Parts Discussed in Thread: SN65LVDS9637 , ADS5485 , ADS5400 I want to interface a high speed ADC such as the ADS5485 with a relatively low power DSP with sleep modes. The high speed ADCs tend to use LVDS outputs and DDR. A differential line receiver…
Other Parts Discussed in Thread: ADS5485 , ADS5463 Hello:
My name is Raul (please excuseme my english) and i need help to interfacing ADS5485 EVM to Spartan 3E FPGA. My problem is that not understand how handle LVDS signals of de output data and DRDY…
Hi Richard,
I am a bristol univeristy research student, we will soon receive the TSW1200 and ADS5485. May I have the Xilinx ISE files (VHDL etc.) for studying.Thanks very much for your support. My email address is: rossai2001@hotmail.com
Xiao
Other Parts Discussed in Thread: TUSB3410 , ADS5485 , ADS6445 , ADS5483 Hi,
My name is Chang Shin.
I'm thinking of using ADC5485 to record my fluorescence signal.
So I ordered ADS5485EVM, TSW1200EVM, hoping to develop the necessary program.
I need…
