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  • ADS54J42: using Beagle bone black to SPI bus

    Part Number: ADS54J42 Hi, I'm working on ADS 54J42. I need to make single lane (A0 and B0) A to D convert. I'm going to keep the setting of ADS 54J42 by using Beagle Bone Black SPI bus. Can you please provide me registers address and bit configuration…
    • Answered

  • ADS54J42: How long does it take to become operational after setting NYQUIST_ZONE ?

    Resolved
    Part Number: ADS54J42 Hello, This post is related to : https://e2e.ti.com/support/data-converters/f/73/t/807324?tisearch=e2e-sitesearch&keymatch=ads54j42 [Q] My customer set the nyquist zone as follows. 0x680042 0x01 //2nd Nyquist zone select…
    • Resolved
    • Answered

  • RE: ADS54J42: takes long time for receiving "sync signal" from FPGA JESD204B PHY.

    Resolved
    Hi, Jim Yes, I think so. But I have a question. When using the ADS54Jxx GUI, there was no problem even if the PLL reset was not performed(I checked this through Status Log window). But Table 66 Initialization sequence in ADS54J42 Data sheet…

  • ADS54J42: Strange 100MHz disturbance

    TI Thinks Resolved
    Part Number: ADS54J42 Hi, We are using an ADS54J42 to sample a DC coupled signal coming from an optical Analog Front-End. The AFE needs to be DC coupled and to use all 14 bits we need the input to be biased at -0.95VDC differentially at zero light input…

  • RE: ADS54J42: ads54j24

    User, Try this attached config file which is using 1241 format. Regards, Jim ADS54J42 config.docx

  • RE: ADS54J42：ads 54j42

    User, Do you issue a hard reset to the ADC after power and clocks are provided? Do you follow the power up sequence per the data sheet? Can you send your ADS54J42 register settings? Regards, Jim
    • Answered

  • ADS54J42: JESD204 Transport Layer Test Patterns

    Resolved
    Part Number: ADS54J42 Section 8.4.2.2 of the ADS54J42 datasheet states: "There are three different test patterns available in the transport layer of the JESD204B interface. The ADS54J42 supports a clock output, encoded, and a PRBS (215 – 1) pattern. These…
    • Resolved
    • Answered

  • ADS54J42: The issue is about 2dB lower when the input frequency is 1/4*fs or 3/4*fs

    Resolved
    Part Number: ADS54J42 Other Parts Discussed in Thread: ADS54J60 Hello, My customer have a question about ADS54J42. [Q] They are evaluating ADS54J42 on their board. The issue is about 2dB lower when the input frequency is 1/4*fs or 3/4*fs. Their…
    • Resolved

  • ADS54J42: Register Question

    Part Number: ADS54J42 I'm Louis Han. I want you explain ADS54J42 Register 1Bh Lower 3bit. ADS54J42_Debug.pdf When this Bit is not set to 0,the ouput will be spur. When this bit set to 0, the ouput Clear. Can you explain me the register…

  • ADS54J42: DC bias differences between "taps" out of ADC

    TI Thinks Resolved
    Part Number: ADS54J42 Hello, I am using an ADS54J42 ADC on a custom PCB. The ADC sample clock rate is 400 MHz. I'm doing LMFS = 4244. So I get four samples at a time out of my JESD204 receiver at 100 MHz. There is a distinct DC bias between "taps" …

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