Hi Markus,
Not entirely. If you tie PDN to a processor signal then you can simply use the signal to place the ADC into PDN (setting PDN signal to high) and then you can wake up the ADC by setting the PDN signal to low.
The configuration of the PDN SPI…
Hi Rob,
Thanks for the suggestions. Currently we already bypass the IL engine, but I will double check the registers... btw, the Interleaving Engine is not documented in the ADS54J69 datasheet. I use the ADS54J66 datasheet for this (Reg 18h of IL Engine…
Hi Amy,
This is additional information about the problem.
The received Signwave shows the same characteristics, and certain parts of the data are also repeated.
Is there a problem with the ADS54J69 Register setting?
Best Regards,
DKKIM.
Dear Rob,
Thank you for your support.
Please let me know if there are update about the issue above.
and here are additional question from my customer ;
1. Last time Jim said that the JESD_TEST pattern should be 0x0001, 0x0002, 0x8000, 0x8000, 0x8000, 0x8000…
Part Number: ADS54J69 Other Parts Discussed in Thread: ADS54J60
Hi Team,
Use ads54j69 to achieve baseband bandwidth of more than 320M sampling.
Can the Jesd204b link only be configured for 4222 and 2242 modes? Thanks.
Among the four outputs, can I choose…
Part Number: ADS54J69 Other Parts Discussed in Thread: ADS54J60 , Hi Team,
How to shut up DECIMATION?
Can the configuration be turned off as others? Thanks.
Best Regards
Charlie Xiao
Part Number: ADS54J69 Hi,
I'm trying to run the ADS54J69 in 2242 mode. But when I checked the jesd interface before programming the IC, I saw that the sync pin was constantly dropping. I connected gt_rx output ports of jesd204_phy ip and rx_sync output…
Part Number: TI-JESD204-IP Other Parts Discussed in Thread: ADS54J69 The TI-JESD204-IP documentation specifies that the RX_LN_DATA_WIDTH parameter has only the following valid options: 32, 64, and 128 bits.
However, I want to run the ADS54J69 using 4 lanes…
Part Number: ADS54J69 Hello,
One customer used ADS54J69 and met questions as following:
1. Configure the ADC with 4222 mode, Reg 0x52=0x08,0x72=0x08. According to Figre74, it should output from Lane0 and Lane1. But actually, lane 1, lane2 and lane 3 all…
Part Number: ADS54J69 Other Parts Discussed in Thread: ADS54J60 , Hi Team,
We have received this inquiry from our customer,
In the ADS54J60 datasheet, page 72 mentions the register 068h that allows to freeze the DC Offset correction.
1- Is this register…