Part Number: ADS54J69 Tool/software: Hello,
We are designing a board with kintex ultrascale FPGA which relies on ADS54J69. I'v seen on a previous post "ADS54J69: JESD204B interface" that you kindly shared the source for KCU105 and ADC EVM that would…
Part Number: ADS54J69 Other Parts Discussed in Thread: LMK04828
Dear TI experts,
My customer asked about ADS54J69 before, but response delays several days.
Could you check the status of this issue? The schedule is very urgent.
https://e2e.ti.com…
Part Number: ADS54J69 Dear Ti Team.
In our board made with ADS54J69, the function generator low frequency (1MHz pulse) input is output as shown below (fig-1). Oscilloscope output for the same function generator is as shown in (fig-2).
ADS54J69 Analog…
Part Number: ADS54J69 Other Parts Discussed in Thread: ADS54J66 Hello TI-Team,
We use many of the ADS54J69 in our temperature controlled beam position measurement system in the accelerators.
We have noticed after resets (.e.g power cycles), that the…
Part Number: ADS54J69 Tool/software: Hi Ameet,
I would like to know the total minimum deterministic latency achieved using ADS54J69 ADC device and the TI JESD204 IP. I need to have latency from the instant the signal applied at the ADC input to the…
Part Number: ADS54J69 Other Parts Discussed in Thread: ADS54J60 Hello,
We are trying to configure our ADS54J69 on our custom FMC board. With an oscilloscope we see data coming from the FPGA to the ADC on the SDIN line, we see the correct SPI clock…
Part Number: ADS54J69 At power up, we keep the ADC in power down mode with the pin 50 (PDN). We tried the following sequence over SPI to wake up the chip, but did not succeed.
#ADS54Jxx_ANALOG W 0x0000 0x81 //Register 0x00 (address = 0h); bit(7) :=…
Part Number: ADS54J69 Hi,
I'm trying to run the ADS54J69 in 2242 mode. But when I checked the jesd interface before programming the IC, I saw that the sync pin was constantly dropping. I connected gt_rx output ports of jesd204_phy ip and rx_sync output…
Part Number: ADS54J69 Other Parts Discussed in Thread: LMK04828 , , Dear TI experts,
My customer now tests ADS54J69 with LMK04828 and xilinx FPGA (use JESD204B)
the block diagram is as below;
They confirmed FPGA_JESD_CLK as 100MHz. (it is okay…
Part Number: ADS54J69 Other Parts Discussed in Thread: ADS54J60 Hello,
We have an application where we'd like to operate the ADS54J69 at a rate below 250MSPS, but the datasheet seems to imply that the device is not capable of using an input clock of…
