Part Number: ADS61B23
Questions for TI ADC.
When utilizing the ADC serial interface, what is the maximum period that reset can be asserted to logic ‘1’ before the ADC reverts to parallel configuration mode ?
When utilizing the serial interface…
Part Number: ADS61B23
ADC ADS61B23 Custom Word configuration.
Documentation incorrect for Custom Word configuration.
Investigation revealed the bit[8] of the ADC word is unreachable (cannot be configured to anything other than ‘0’). Investigation…
Part Number: ADS61B23
Hi,
We used SPI port to program ADC into test pattern DIGITAL RAMP. Logic analyzer capture seems OK but I was under impression that digital ramp will increment from 000 - FFF on every clock cycle.
Does this look normal…
Part Number: ADS61B23 Hi,
ADC is in a serial mode by setting RST pin high.
To initialize the ADC registers via SPI port according to the data sheet bit 4 in ADC register at address 0x00 has to be set to 1.
Question:
Can we write our configuration…
Part Number: ADS61B23 High,
Can switching from parallel to serial SPI mode be done on the fly?
What I mean by that is can we boot with RST pin HIGH and latter change RST to LOW and perform SPI configuration.
I have notice that on an Evaluation…
Part Number: ADS61B23 I have been testing the ADS61B23 IC for quite some time and have encountered a persistent problem even if I change my IC or pcb. The ADC is not able to withstand recommended supply voltage of 3.3V (AVDD) and 1.8V (DRVDD) while operating…
