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  • ADS7223: 4 lowest bits

    Resolved
    Part Number: ADS7223 Dear Team. ADS7223 is a 12bit converter but sends 16bit across the interface. In table 7. datasheet we show the 4 lowest bit as '0000'. Is this guaranteed or just an example? Can we rely on those four lowest bits being '0000'?…
    • Resolved

  • ADS7223: PoR timing and switching half clock mode to full clock mode

    TI Thinks Resolved
    Part Number: ADS7223 Hi Team, 1) What is the suggested wait time after a PoR? Is this the same as wake up time 8ms or is there a difference? 2) is the first sample valid when switching from half clock mode to full clock mode? Or does it have to be ignored…

  • ADS7223: Input Pin sensing interference signal while conversion

    Part Number: ADS7223 Hi Team, Customer use ADS7223 to poll and collect 6 channels of single ended input analog signals. The schematic diagram of this part is as attached. After each ADS7223 conversion, the input pin of each analog signal will sense the…

  • ADS7223: CID in full clock mode

    TI Thinks Resolved
    Part Number: ADS7223 Other Parts Discussed in Thread: ADS8363EVM Hello Team, we are using the ADS7223 in full clock mode. Our idea was to read the CID with each conversion for plausibility testing. It seem that in this mode the channel number reported…
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  • ADS7223: interface timing

    Resolved
    Part Number: ADS7223 Hello Team, I do have a question regarding the interface ting of ADS7223. It will be connected to an FPGA. The ADC will operate in pseudo diff configuration and full-clock-mode will be enabled. Attached a simulation of the planned timing…
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  • ADS7223: USING multiple ADS7223

    Part Number: ADS7223 Other Parts Discussed in Thread: ADS8586S , ADS8588S , AMC1100 , ADS7253 I need to monitor voltage and current on high voltage 3-phase ac line circuits. Therefore, I would like to use three separate ADS7223 to make three dual simultaneous…

  • ADS7223: Conversion result read issue

    Part Number: ADS7223 Dear Sir/Madam, I am using ADS7223 ADC in differential mode with combined RD and CONVST signal. I am using Mode-2 to control channel selection manually. The read conversion result is changing with multiple reads for the same input…
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  • ADS7223, ADS7263 and ADS8363 data-sheet question

    Resolved
    Hi, Could you please help me to check the content of datasheet? Bits[9:0] default value is 1FFh? why 1FFh = 2.5V? For Midscale - 1LSB, the following is my equation. AD8363 : 2.5-(5/65536) = 2.499924, same as datasheet AD7263 : 2.5-(5/16384) = 2.499695…
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    • Answered

  • ADS7223 register access

    Resolved
    Other Parts Discussed in Thread: ADS7223 I am working with the ADS7223 ADC. Regarding the configuration interface (in specific access to the REFDAC registers) I could not fully keep my interpretation of the data sheet - and the way I have seen the chip…
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    • Answered

  • ADS7223 on the single input

    Resolved
    Other Parts Discussed in Thread: ADS7223 Hi. My customer want to use ADS7223 on Single Input. Then, is it possible to achieve resolution of 12 bit under the following condition? - Fully differential mode - Input Voltage = 0 ~ 3.3V - VREF = 1.65V - Input…
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