Part Number: ADS9219 Hello team,
On the datasheet Fig 5-3, FCLK is 6*DCLK, when data frame width =24bit (DDR).
What would be the length of FCLK, when data frame width = 20 bit (DDR)? Is it going to be 5*DCLK?
Best Regards, Kei Kuwahara
Part Number: ADS9219 Hello team,
I am confused for gain error calibration.
On Datasheet Table 6-9, Initialization Sequence states to "Enable gain calibration".
Q1: Should I always enable this gain error calibration during initialization?
Q2…
Part Number: ADS9219 Hello team,
My customer only use single ADS9219, so they don't do daisy chain connection.
I wonder what is the difference between the settings below:
Setting 1.
Set Register 00h to Legacy SPI mode .
Setting 2.
Set Register 00h…
Part Number: ADS9218 Other Parts Discussed in Thread: ADS9219 , Tool/software: Hello TI Team,
I found the related locked thread on the ADS9218 production status. I have the same question -- we're evaluating the ADS9218 and/or ADS9219 for a new high speed…
Hello Austin,
Thank you for bringing this up. This message on this GUI appears due to the device not being fully released to market yet, but the GUI/device should still be functional, this message can be ignored.
This GUI works with multiple EVMs and…
Part Number: ADS9218 Other Parts Discussed in Thread: ADS9217 , ADS9219 Tool/software: Hi,
In the data sheet for the ADS921x (SBASA74B – JANUARY 2023 – REVISED MAY 2024) there is an example init-sequence which is not applicable for the ADS9218.…