Part Number: AFE11612-SEP Hello,
Are Space Enhanced Plastic (SEP) devices qualified by only a few lots and not tested on a lot-by-lot basis. In the Reliability and Production Flow of -SEP devices there is a "LOTS REQUIRED" column in the table, does…
Part Number: AFE11612-SEP Tool/software: Hello,
Just wondering if there was an update for AFE11612-SEP: Radiation tolerant transistor for temperature sensing
Would you have any suggestions for radiation tolerant transistors that could be used?
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Part Number: AFE11612-SEP Hello : )
Was just wondering if you had a current handling specification for the diodes in the protection stage of the analog inputs on the AFE11612.
I didn't realize that the 2.5V Ref-out would be off by default and I used…
Part Number: AFE11612-SEP
Hello,
I am using the AFE11612-SEP in a custom design. I plan to operate it in SPI mode and use the internal voltage reference for both the ADC and DAC.
I will not be using the GPIOs or the DAC channels, and I do not want…
Part Number: AFE11612-SEP Other Parts Discussed in Thread: TMP461-SP
Hello Experts,
I am considering using AFE11612-SEP device in video camera design and would like to clarify some questions regarding remote temperature sensor requirements. Our CMOS…
Part Number: AFE11612-SEP
Tool/software:
Hello, I would like to better understand the internal circuitry related to the Alarm Pin function in the ADC. The datasheet does not provide a complete block diagram showing the signal path up to the Alarm…
Part Number: AFE11612-SEP Tool/software: Hello, My customer has questions about single event immunity as follows. Q1: According to the data sheet, SEFI is characterized up to 43 MeV. But looking at AFE11612-SEP Single-Event Effects (SEE) Test Report …
Part Number: AFE11612-SEP Other Parts Discussed in Thread: MSP430FR5969 Tool/software: Hi,
I am using MSP430FR5969 to set DACs and read ADCs from v62/22614-01xe ( AFE11612PAPSEP ). The AFE11612 is controlled over SPI bus (2 MHz clock) as a standalone…
Part Number: AFE11612-SEP Tool/software: What is the latency from the DAC-CLR-n pin going low until the corresponding DAC outputs go the pre-defined outputs?
Also please confirm that each DAC maybe have a unique setting for this pre-defined output level…
