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Part Number: AFE5816 Tool/software: Hi, everyone
In the previous thread, a TI expert mentioned that the default ADC output format is in two's complement form and advised that to change the output format, one should set register 4, bit 3 to 1.
I have…
Part Number: AFE5816 Tool/software: Hi, everyone
I am using a function generator to create an analog sine waveform, which I input into the AFE5816 and then verify the output through the FPGA.
Before inputting the analog signal, I configured the 14-bit…
Part Number: AFE5816 Tool/software: Hi, everyone
I tried to use AFE5816 in my custom board for ADC.
My circuit is like the figure below
INM pins are connected to ground directly without capacitors.
Is there any problem to make circuit like that?
Actually…
Part Number: AFE5816 Hi everyone,
I have two questions about AFE5816
1) Absolute maximum of ADC_CLK (single-ended case & LVDS case)
2) Does the test pattern in AFE5816 operate independently of the ADC clock?
Thanks
Part Number: AFE5816 Tool/software: Hi, everyone
Now i'm trying to test output of the AFE5816.
This is my register setting sequence for low-power mode operting.
01h / 0014h
41h / 8000h
42h / 8000h
41h / 0000h
42h / 0000h
03h / 2000h
04h / 0001h
…
Part Number: AFE5816 I am trying to verify the output from the AFE using a test pattern. I want to check the output data through ILA, and the clocks are as follows: ILA clock = 280MHz AFE input clock = 10MHz It is set to 14bit 1X serialization.
In the…
Part Number: AFE5816 I guess before we get to my question, what's up with the datasheet on the AFE5816? It's only a couple pages long, it used to be really long and detailed...I can't find the full datasheet anywhere. Please send that or update…
There can be slight timing mismatch. Also your FPGA delays for each path also comes into picture. Once you capture the LVDS Data you should not face any issue .