There can be slight timing mismatch. Also your FPGA delays for each path also comes into picture. Once you capture the LVDS Data you should not face any issue .
Part Number: AFE5816 Hello TI Community,
I'm in the process of analyzing the AFE5816 chip for a planned design and have a few questions that I hope the community can help me with:
AC PERFORMANCE (Power) - AVDD_1P9 PSSR: I noticed in the AC PERFORMANCE…
Hi Ravi,
Time domain data will look like a random varying codes with standard deviation given by the RMS noise. Standard deviation will change with gain. This is very usual data we will get. I see your image is noisy. We can debug that directly. Have…
Part Number: AFE5816 Is there a ChipID register (undocumented ??) that I can use to identify the chip by SPI read??. I couldn't find any chip id for this part in the datasheet.
Part Number: AFE5816 Hello
We are working on programming the afe5816. We are interested in producing a system capable of measuring signals transmitted from different transmitters continuously.
That is, we transmit trigger signals train and for each trigger…
Part Number: AFE5816 With PAT_SELECT_IND = 0, all channels are expected to have the same Ramp pattern. However a random offset between high and low 8 channels appears.
e.g when channels 1-8 read 100, channels 9-16 read 900. Only occasionally do all 16 channels…
Part Number: AFE5816 Hi,
According to the AFE5816 datasheet, "the ramp, toggle and pseudo-random sequence (PRBS) test patterns can be reset or syncronized by providing a synchronization pulse on the TX_TRIG pin or by setting and resetting a specific register…
Part Number: AFE5816 Other Parts Discussed in Thread: AFE5808A Hi,
It seems no data output format is specified in the datasheet. Are data in two-complement or offset-binary format? Other parts, like AFE5808A, allow the user to choose between both formats…