Part Number: AFE5832LP Hi, experts from TI.
I would like to inquire about the power consumption of the AFE5832LP chip. When we were using this chip, we found that its power consumption was rather high. Then we consulted the data manual.
In the 12…
Part Number: AFE5832LP Hi, experts from TI.
We have encountered some issues while using the DTGC function of the AFE5832LP chip. We need your assistance.The AFE5832LP chip supports 4 types of DTGC functions, among which we use the up,down Ramp modes…
Part Number: AFE5832LP
Hi,
I’m following up on a question from an earlier thread regarding the AFE5832LP, which is now locked ("AFE5832LP: AFE initialization issue").
TI previously indicated that DVDD_1P2 must be up and stable before the other supplies…
Part Number: AFE5832LP Dear Team,
Please provide the complete datasheet of AFE5832LPZAV including schematic symbol name and pinout details as well as the footprint data. For adding the component to our centralized library we need these information.…
Part Number: AFE5832LP Hi,
We have observed an issue on certain AFE devices, where the device comes up in a bad state after power-up and initialization. The symptom is as follows:
Data is successfully received through the LVDS interface, but the…
Part Number: AFE5832LP Hello,
I was going through the Swroop Reference Design and noticed that an EEPROM is present in the design.
Could you please clarify the following:
What is the purpose of the EEPROM in the design?
What type of data…
Part Number: AFE5832LP Hi Sir/Madam,
Could you please tell me how to configure PLL of AFE 5832 since I found the output data of 32 channels the device are not aligned in phase. Could you please give me an example configure protocol or codes for me.…
Part Number: AFE5832LP Other Parts Discussed in Thread: AFE5832 Hi Sir/Madam,
Could you please tell me what should I do to avoid phase influences of TX_TRIG on sampling (I connect TX_TRIG signal to line_start) after I finished configuration of PLL …
Part Number: AFE5832LP In the AFE5832LP datasheet, there is the following description: 1. Partial power-down when PDN_FAST = high and the device is in partial power-down time for < 500 us, power-up time 8us(TYP). 2. Complete power-down when PDN_GBL =…
Part Number: AFE5832LP I am setting AFE5832LP to test mode RAMP, receiving AD data from 32 channels through FPGA, and checking the change mode. I have identified the following issues:
1: The changes in channels 1 to 16 are consistent with the expected…
