Part Number: AFE58JD32LP
Hello dear community.
I am going to use the AFE58JD32LP and (since the design is almost finished) in short of SPI connections
The AFE has it's own designated SPI bus (1:1 with the FPGA), so I thought that I don't need to use the…
Part Number: AFE58JD32LP Other Parts Discussed in Thread: AFE58JD32 Hi, team:
My customer use AFE58JD3LP in their ultrasound,
The DCLK of AFE58JD32 is output by AFE 480MHz, but the measured clock offset is very large, more than 6%. Minimum :448MHz, maximum…
Part Number: AFE58JD32LP Hi, Good day. Our customer have a question regarding the AFE58JD32LP. Kindly see below.
The datasheet gives the current draw per net. It also giver the power dissipation per channel. I am wondering if the current draw per nets…
Hi,
EVM is built to support AFE5832LP and AFE58JD32LP . So the difference in AFE5832LP datasheet and evm is because of that . These additional pins does not affect the functionality/performance of the AFE5832LP chip. You can follow the datasheet guidelines…
Hello Ryu,
Thanks for reaching out and for your interest in AFE58JD32LP. AFE58JD32LP collaterals are shared under NDA.
Please ask your client to request for the AFE58JD32LP collaterals and other design resources by clicking on the ‘Request Now’ button…
Hi Marco,
Thanks for sharing the waveforms with different configurations.
In your initial configuration (data dump SDS00002.csv), the adc clock frequency is 31.25 MHz. That explains why you are seeing a tone at 6.4 MHz. Since in HSDC pro you set Fs to…
