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  • AFE58JD48: Datasheet request for AFE58JD48 was denied

    Part Number: AFE58JD48 Other Parts Discussed in Thread: TX08D , I recently requested the datasheets for TX08D and AFE58JD48. I received a follow-up email asking for more details about my application, and I responded with information about the project…

  • AFE58JD48: AFE58JD48 issue

    Part Number: AFE58JD48 Hi experts, I want to configurate the analog TGC at 0.5 dB step. But how it can configurate through VCNTL? Can you please help provide some demo or guide documents? Thanks.
    • Answered

  • AFE58JD48: why my AFE58JD48 config in x80 it seems send wrong ILA sequence to my xilinx FPGA?

    Resolved
    Part Number: AFE58JD48 Respected TI experts We now tring AFE58JD48 in x80 mode with less highspeed GT link to xilinx FPGA xku5p devices,but the jesd204b link sometimes not bringup,so i using xilinx tools to scope the jesd204b phy output dat.I find that…
    • Resolved
    • Answered

  • AFE58JD48: AFE58JD48 Auto Offset Correction Mode (Offset Correction Using a Built-In Offset Calculation Function)

    Resolved
    Part Number: AFE58JD48 Hello, I am using the Auto Offset Correction Mode of the AFE58JD48 chip. However, when I configure the parameters according to the register instructions in the datasheet, it has no effect, and the signal still deviates from the…
    • Resolved
    • Answered

  • AFE58JD48: Data mismatch observed when using the AFE58JD48 pattern generation function to verify uploaded data correctness — possible root cause inquiry

    Resolved
    Part Number: AFE58JD48 When configuring the custom pattern to alternate between 16728 and –9981 (as shown in Figure 1), incorrect data is observed under certain conditions. Specifically, the received data becomes –9853 , which differs from the expected…
    • Resolved

  • AFE58JD48: afe58jd48

    Part Number: AFE58JD48 Tool/software: Hello, I have a few questions for you: Problem 1: reset to read the register, such as read 0xDF, read out as 0xC700, not the default value; Problem 2: Operation register failure, such as 0x0040 written to 0xDF…
    • Answered

  • AFE58JD48: The problem of synchronous sampling of multiple AFE58JD48 chips

    Resolved
    Part Number: AFE58JD48 Other Parts Discussed in Thread: TX7332 , Tool/software: Hello! Recently, we are developing an ultrasonic imaging system using TX7332 and AFE58JD48. There are several issues. Firstly, what is the sampling start control signal…
    • Resolved

  • AFE58JD48: AFE58JD48 configuration

    Part Number: AFE58JD48 Tool/software: I hope to configure the AFE with FPGA and establish a high-speed interface using the JESD204B protocol (subclass 0/1/2). The AFE uses the 40x mode, and the correctness of SPI read and write has been verified. …

  • AFE58JD48: How to implememt AFE58JD48 DTGC using TGC_PROFILE

    Part Number: AFE58JD48 Tool/software: Hi TI experts, The AFE58JD48 can pre-store up to four analog gains, i.e. TGC_PROFILE[3:0], which can be pin-selected to enable a certain TGC_PROFILE, how do I implement DTGC with the help of this function? …

  • AFE58JD48: How to config JESD204B LMFS, K Parameters for 2 co-working AFE58JD48

    Part Number: AFE58JD48 Tool/software: Hi TI experts, I am planning to use one FPGA to communicate with two AFE58JD48 devices simultaneously. Both AFEs are working in 80x mode (4-lane mode). I would like to consider the two AFE58JD48 devices as…

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