Hi Muhammad,
The table that you are referring to shows all of the decimation factors that are supported in the AFE7900/AFE7950 devices. Other sample rates can be used with these decimation factors to achieve other interface rates. The AFE79xx Latte GUI…
Part Number: AFE7900 Other Parts Discussed in Thread: TI-JESD204-IP hi,
I start a request of TI204C-IP.I received a email .
I don't received other information until now.please help me,what do I need to do now?
Part Number: AFE7900 Other Parts Discussed in Thread: TI-JESD204-IP hi,
I am completing a request form for the TI-JESD204-IP.I am unsure about Project Name ,Production Time and Volume Potential.How do I need to fill out this information?
thanks!
Part Number: AFE7900 Hi,
We have a custom board that have multiple AFEs and we want to apply Multichip Synchronization steps. So, as first step we are trying to align Sysref and AFE Sampling clock.
After initializing the AFE7900, we continue to send Syref…
Hi Fimmy,
It seems like there was no extra data that would fit your conditions. I have decided to try this in the AFE7900EVM by using Fdac = 10GSPS in straight mode with interpolation by 20. Please see the table below for the results.
I was using TXA which…
Hi Muhammad,
Sorry for the delay.
Your calculation is correct. The output sample rate is 122.88MSPS. But this need not be equal to FPGA refence clock. In TI JESD204 IP, SERDES lane output data is parallelized to 80 streams. That's why reference clock…
Part Number: AFE7900 Hello,
We are in the process of migrating your reference design (44210 operating in non-deterministic latency mode) to our custom FPGA board.
For the same we were looking at how the GTH transceiver is configured and noticed the…
Hi Nirmal,
To generate the list of SPI writes/polls/readchecks that are required to bringup the AFE you have to use the AFE79xx GUI. In the GUI you can enable logging of the SPI operations you can update the following parameter in your script: logDumpInst…